emscripten-fastcomp - LLVM with the emscripten fastcomp javascript backend

Age	Commit message (Collapse)	Author
2012-03-17	Reorder includes to match coding standards. Fix an issue or two exposed by that.	Craig Topper
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152978 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-05	Implement frame unwinding information emission for Thumb1. Not finished yet ↵	Anton Korobeynikov
	because there is no way given the constpool index to examine the actual entry: the reason is clones inserted by constant island pass, which are not tracked at all! The only connection is done during asmprinting time via magic label names which is really gross and needs to be eventually fixed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127104 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07	80-column cleanup of file header comments	Jim Grosbach
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86408 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-28	Cleanup now that frame index scavenging via post-pass is working for ARM and ↵	Jim Grosbach
	Thumb2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85406 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28	- More refactoring. This gets rid of all of the getOpcode calls.	Evan Cheng
	- This change also makes it possible to switch between ARM / Thumb on a per-function basis. - Fixed thumb2 routine which expand reg + arbitrary immediate. It was using using ARM so_imm logic. - Use movw and movt to do reg + imm when profitable. - Other code clean ups and minor optimizations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77300 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-26	Refactor. Get rid of a few more getOpcode() calls.	Evan Cheng
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77164 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-24	Correctly handle the Thumb-2 imm8 addrmode. Specialize frame index ↵	David Goodwin
	elimination more exactly for Thumb-2 to get better code gen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76919 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16	Let callers decide the sub-register index on the def operand of ↵	Evan Cheng
	rematerialized instructions. Avoid remat'ing instructions whose def have sub-register indices for now. It's just really really hard to get all the cases right. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75900 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08	Use common code for both ARM and Thumb-2 instruction and register info.	David Goodwin
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75067 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08	Generalize opcode selection in ARMBaseRegisterInfo.	David Goodwin
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75036 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08	Push methods into base class in preparation for sharing.	David Goodwin
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75020 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-02	Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into ↵	David Goodwin
	Thumb1InstrInfo, Thumb2InstrInfo, Thumb1RegisterInfo and Thumb2RegisterInfo. Move methods from ARMInstrInfo to ARMBaseInstrInfo to prepare for sharing with Thumb2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74731 91177308-0d34-0410-b5e6-96231b3b80d8