index
:
emscripten-fastcomp
master
LLVM with the emscripten fastcomp javascript backend
git repository hosting
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
lib
/
Target
/
ARM
/
Thumb1RegisterInfo.cpp
Age
Commit message (
Expand
)
Author
2009-12-03
improve portability to avoid conflicting with std::next in c++'0x.
Chris Lattner
2009-11-09
Use Unified Assembly Syntax for the ARM backend.
Jim Grosbach
2009-11-07
80-column cleanup of file header comments
Jim Grosbach
2009-10-28
Cleanup now that frame index scavenging via post-pass is working for ARM and ...
Jim Grosbach
2009-10-22
Trim more includes.
Evan Cheng
2009-10-21
Missing piece of the ARM frame index post-scavenging conditionalization
Jim Grosbach
2009-10-20
Now that all ARM subtargets use frame index scavenging, the Thumb1 requires*
Jim Grosbach
2009-10-19
Enable allocation of R3 in Thumb1
Jim Grosbach
2009-10-19
Adjust the scavenge register spilling to allow the target to choose an
Jim Grosbach
2009-10-08
Cleanup up unused R3LiveIn tracking.
Jim Grosbach
2009-10-08
Re-enable register scavenging in Thumb1 by default.
Jim Grosbach
2009-10-07
reverting thumb1 scavenging default due to test failure while I figure out wh...
Jim Grosbach
2009-10-07
Enable thumb1 register scavenging by default.
Jim Grosbach
2009-10-07
Add register-reuse to frame-index register scavenging. When a target uses
Jim Grosbach
2009-10-05
In Thumb1, the register scavenger is not always able to use an emergency
Jim Grosbach
2009-10-01
ARM::tPOP and tPOP_RET each has an extra writeback operand now.
Evan Cheng
2009-09-24
Start of revamping the register scavenging in PEI. ARM Thumb1 is the driving
Jim Grosbach
2009-09-06
Remove some unused variables and methods warned about by
Duncan Sands
2009-08-13
Push LLVMContexts through the IntegerType APIs.
Owen Anderson
2009-08-11
Shrinkify Thumb2 load / store multiple instructions.
Evan Cheng
2009-08-11
Whitespace cleanup. Remove trailing whitespace.
Jim Grosbach
2009-08-10
Rename MVT to EVT, in preparation for splitting SimpleValueType out into its ...
Owen Anderson
2009-07-28
tADDrSPI doesn't have a predicate operand, but tADDhirr and tADDi3 have.
Evan Cheng
2009-07-28
- More refactoring. This gets rid of all of the getOpcode calls.
Evan Cheng
2009-07-26
Rename tMOVhi2lor to tMOVgpr2tgpr. It's not moving from a high register to a ...
Evan Cheng
2009-07-26
Refactor. Get rid of a few more getOpcode() calls.
Evan Cheng
2009-07-24
Revert the ConstantInt constructors back to their 2.5 forms where possible, t...
Owen Anderson
2009-07-24
Correctly handle the Thumb-2 imm8 addrmode. Specialize frame index eliminatio...
David Goodwin
2009-07-22
Get rid of the Pass+Context magic.
Owen Anderson
2009-07-20
Fix PR4567. Thumb1 target was using the wrong instruction to handle sp = sub ...
Evan Cheng
2009-07-19
Fix a regression from 76124. Thumb1 instructions default to S bit being true.
Evan Cheng
2009-07-16
Emit cross regclass register moves for thumb2.
Anton Korobeynikov
2009-07-16
Let callers decide the sub-register index on the def operand of rematerialize...
Evan Cheng
2009-07-14
Move EVER MORE stuff over to LLVMContext.
Owen Anderson
2009-07-14
llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.
Torok Edwin
2009-07-11
Major changes to Thumb (not Thumb2). Many 16-bit instructions either modifies...
Evan Cheng
2009-07-08
Implement changes from Chris's feedback.
Torok Edwin
2009-07-08
Generalize opcode selection in ARMBaseRegisterInfo.
David Goodwin
2009-07-08
Push methods into base class in preparation for sharing.
David Goodwin
2009-07-08
Start converting to new error handling API.
Torok Edwin
2009-07-02
Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into Thumb1Ins...
David Goodwin