emscripten-fastcomp - LLVM with the emscripten fastcomp javascript backend

Age	Commit message (Expand)	Author
2012-04-11	Fix a number of problems with ARM fused multiply add/subtract instructions.	Evan Cheng
2012-02-18	Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...	Jia Liu
2011-01-20	Sorry, several patches in one.	Evan Cheng
2010-11-13	Conditional moves are slightly more expensive than moves.	Evan Cheng
2010-10-21	putback r116983 and fix simple-fp-encoding.ll tests	Andrew Trick
2010-10-21	Revert r116983, which is breaking all the buildbots.	Owen Anderson
2010-10-21	Add missing scheduling itineraries for transfers between core registers and V...	Evan Cheng
2010-10-07	Model operand cycles of vldm / vstm; also fixes scheduling itineraries of vld...	Evan Cheng
2010-10-06	- Add TargetInstrInfo::getOperandLatency() to compute operand latencies. This	Evan Cheng
2010-09-30	ARM instruction itinerary fixes:	Evan Cheng
2010-09-29	Separate itinerary classes for mvn from mov; for tst / teq from cmp / cmn.	Evan Cheng
2010-09-29	Assign bitwise binary instructions different itinerary classes from ALU instr...	Evan Cheng
2010-09-28	Add support to model pipeline bypass / forwarding.	Evan Cheng
2010-09-25	Remove a unused instruction itinerary class.	Evan Cheng
2010-09-25	Fix zero and sign extension instructions scheduling itineraries.	Evan Cheng
2010-09-24	More pseudo instruction scheduling itinerary fixes.	Evan Cheng
2010-09-09	For each instruction itinerary class, specify the number of micro-ops each	Evan Cheng
2010-06-02	Clean up 80 column violations. No functional change.	Jim Grosbach
2010-04-18	Make processor FUs unique for given itinerary. This extends the limit of 32	Anton Korobeynikov
2009-11-18	Add ARMv6 itineraries.	David Goodwin
2009-09-23	Checkpoint NEON scheduling itineraries.	David Goodwin
2009-09-21	Add Cortex-A8 VFP model.	David Goodwin
2009-08-19	Update Cortex-A8 instruction itineraries for integer instructions.	David Goodwin
2009-08-15	Turn on if-conversion for thumb2.	Evan Cheng
2009-08-13	Finalize itineraries for cortex-a8 integer multiply	David Goodwin
2009-08-11	Allow a zero cycle stage to reserve/require a FU without advancing the cycle ...	David Goodwin
2009-08-10	Checkpoint scheduling itinerary changes.	David Goodwin
2009-07-21	Fix comment.	Evan Cheng
2009-06-19	Latency information for ARM v6. It's rough and not yet hooked up. Right now ...	Evan Cheng