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path: root/lib/Target/ARM/ARMISelLowering.cpp
AgeCommit message (Collapse)Author
2007-10-18legalizing the ret operation on f64 shouldn't introduce a newChris Lattner
i64 bit convert needlessly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43116 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11Set ISD::FPOW to Expand.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42881 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-08Migrate X86 and ARM from using X86ISD::{,I}DIV and ARMISD::MULHILO{U,S} toDan Gohman
use ISD::{S,U}DIVREM and ISD::{S,U}MUL_HIO. Move the lowering code associated with these operators into target-independent in LegalizeDAG.cpp and TargetLowering.cpp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42762 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-11Fold the adjust_trampoline intrinsic intoDuncan Sands
init_trampoline. There is now only one trampoline intrinsic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41841 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-31Enhance APFloat to retain bits of NaNs (fixes oggenc).Dale Johannesen
Use APFloat interfaces for more references, mostly of ConstantFPSDNode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41632 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-27Support for trampolines, except for X86 codegen which isDuncan Sands
still under discussion. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40549 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-05Here is the bulk of the sanitizing.Gabor Greif
Almost all occurrences of "bytecode" in the sources have been eliminated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37913 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-05Reflects the chanegs made to PredicateOperand.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37898 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-26Silence a warning.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37737 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-22Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits fromDan Gohman
TargetLowering to SelectionDAG so that they have more convenient access to the current DAG, in preparation for the ValueType routines being changed from standalone functions to members of SelectionDAG for the pre-legalize vector type changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37704 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-19Be more conservative of duplicating blocks.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37669 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-19Allow predicated immediate ARM to ARM calls.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37659 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-01Set ARM ifcvt duplication limit to 3 for now.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37385 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-18Silence some compilation warnings.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37197 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-18Set ARM if-conversion block size threshold to 10 instructions for now.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37194 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-17More effective breakdown of memcpy into repeated load/store. These are nowDale Johannesen
in the order lod;lod;lod;sto;sto;sto which means the load-store optimizer has a better chance of producing ldm/stm. Ideally you would get cooperation from the RA as well but this is not there yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37179 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-14Fix previous patch. GOTOFF can be used only when the symbol has internalLauro Ramos Venancio
linkage or hidden visibility. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37055 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-14Optimize PIC implementation. GOTOFF can be used when the symbol is definedLauro Ramos Venancio
and used in the same module. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37044 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-04On Mac OS X, GV requires an extra load only when relocation-model is non-static.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36718 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-03Debug support for arm-linux.Lauro Ramos Venancio
Patch by Raul Herbster. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36690 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-03Typo. It's checking if V is multiple of 4, not multiple of 3. :-)Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36663 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27ARM TLS: implement "general dynamic", "initial exec" and "local exec" models.Lauro Ramos Venancio
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36506 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27Darwin runtime library does not have these.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36505 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-22Implement PIC for arm-linux.Lauro Ramos Venancio
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36324 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-13arm has r+r*s and r+i addr modes, but no r+i+r*s addr modes.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35962 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-11Fix incorrect fall-throughs in addr mode code. This fixes ↵Chris Lattner
CodeGen/ARM/arm-negative-stride.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35909 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-10restore support for negative stridesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35859 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-09remove dead target hooksChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35846 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-09remove some dead target hooks, subsumed by isLegalAddressingModeChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35840 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-04Typo.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35639 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-03Arm supports negative strides as well, add them. This lets us compile:Chris Lattner
CodeGen/ARM/arm-negative-stride.ll to: LBB1_2: @bb str r1, [r3, -r0, lsl #2] add r0, r0, #1 cmp r0, r2 bne LBB1_2 @bb git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35609 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-02fix the CodeGen/ARM/2007-03-13-InstrSched.ll regression: allow IV's with scalesChris Lattner
to be folded into non-store instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35601 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-02add support for the 'w' inline asm register class.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35598 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-02- Divides the comparisons in two types: comparisons that only use N and ZLauro Ramos Venancio
flags (ARMISD::CMPNZ) and comparisons that use all flags (ARMISD::CMP). - Defines the instructions: TST, TEQ (ARM) and TST (Thumb). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35573 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-01Add i16 address mode.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35551 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-30implement the new addressing mode description hook.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35521 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28Remove isLegalAddressImmediate.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35406 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-27bugfix: sometimes the spiller puts a load between the "mov lr, pc" and "bx" ↵Lauro Ramos Venancio
of a CALL_NOLINK. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35381 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25switch TargetLowering::getConstraintType to take the entire constraint,Chris Lattner
not just the first letter. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35322 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-21repair x86 performance, dejagnu problems from previous changeDale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35245 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20do not share old induction variables when this would result in invalidDale Johannesen
instructions (that would have to be split later) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35227 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20bugfix: When the source register of CALL_NOLINK was LR, the following code ↵Lauro Ramos Venancio
was emitted: mov lr, pc bx lr So, the function was not called. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35218 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20fix indentationChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35202 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19Fix naming inconsistencies.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35163 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16Only ARMv6 has BSWAP.Lauro Ramos Venancio
Fix MultiSource/Applications/aha test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35128 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16Added isLegalAddressExpression(). Only allows X +/- C for now.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35122 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13Zero is always a legal AM immediate.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35087 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12Updated TargetLowering LSR addressing mode hooks for ARM and Thumb.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35075 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08Fix a typo.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35030 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-07Refactoring of formal parameter flags. Enable properly use ofAnton Korobeynikov
zext/sext/aext stuff. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35008 91177308-0d34-0410-b5e6-96231b3b80d8
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