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| author | Lauro Ramos Venancio <lauro.venancio@gmail.com> | 2007-03-27 16:19:21 +0000 |
|---|---|---|
| committer | Lauro Ramos Venancio <lauro.venancio@gmail.com> | 2007-03-27 16:19:21 +0000 |
| commit | b8a93a45f8db0ff507c3833c88f24d5fcd9b2ed4 (patch) | |
| tree | af5ec4830242a0d0dc56a4df8d09e7203dd3a614 /lib/Target/ARM/ARMISelLowering.cpp | |
| parent | dd433210797bc13513989a033e488d4e19442723 (diff) | |
bugfix: sometimes the spiller puts a load between the "mov lr, pc" and "bx" of a CALL_NOLINK.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35381 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMISelLowering.cpp')
| -rw-r--r-- | lib/Target/ARM/ARMISelLowering.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index cb3d923351..50ac5e9c69 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -555,10 +555,10 @@ SDOperand ARMTargetLowering::LowerCALL(SDOperand Op, SelectionDAG &DAG) { CallOpc = (isDirect || Subtarget->hasV5TOps()) ? ARMISD::CALL : ARMISD::CALL_NOLINK; } - if (CallOpc == ARMISD::CALL_NOLINK) { - // On CALL_NOLINK we must move PC to LR + if (CallOpc == ARMISD::CALL_NOLINK && !Subtarget->isThumb()) { + // implicit def LR - LR mustn't be allocated as GRP:$dst of CALL_NOLINK Chain = DAG.getCopyToReg(Chain, ARM::LR, - DAG.getRegister(ARM::PC, MVT::i32), InFlag); + DAG.getNode(ISD::UNDEF, MVT::i32), InFlag); InFlag = Chain.getValue(1); } |