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path: root/lib/Target/ARM/ARMISelDAGToDAG.cpp
AgeCommit message (Expand)Author
2013-07-15Merge commit '7dfcb84fc16b3bf6b2379713b53090757f0a45f9'Eli Bendersky
2013-04-19ArrayRefize getMachineNode(). No functionality change.Michael Liao
2013-03-11Merge commit '279b9184c2ff4fea93b198a3519b8cb3a1d8d195'Eli Bendersky
2013-03-09Don't glue users to extract_subreg when selecting the llvm.arm.ldrexdLang Hames
2013-03-07ArrayRefize some code. No functionality change.Benjamin Kramer
2013-02-14Re-apply r175088 for bug fix 13622: Add paired register support forWeiming Zhao
2013-02-13temporarily revert the patch due to some conflictsWeiming Zhao
2013-02-13Bug fix 13622: Add paired register support for inline asm with 64-bit data on...Weiming Zhao
2013-01-30Merge commit 'a662a9862501fc86904e90054f7c1519101d9126'Derek Schuff
2013-01-11Merge commit '1ad9253c9d34ccbce3e7e4ea5d87c266cbf93410'Derek Schuff
2013-01-02Move all of the header files which are involved in modelling the LLVM IRChandler Carruth
2012-12-19LLVM sdisel normalize bit extraction of the form:Evan Cheng
2012-12-03Use the new script to sort the includes of every file under lib.Chandler Carruth
2012-11-29Added atomic 64 min/max/umin/umax instrinsics support in the ARM backend.Silviu Baranga
2012-11-27Merge commit '8d20b5f9ff609e70fae5c865931ab0f29e639d9c'Derek Schuff
2012-11-17Rename methods like PairSRegs() to createSRegpairNode() to meet our codingWeiming Zhao
2012-11-16Remove hard coded registers in ARM ldrexd and strexd instructionsWeiming Zhao
2012-10-01Merge commit '72f0976c1b91c7ba50dce4d0ad0289dc14d37f81'Derek Schuff
2012-09-29Add LLVM support for Swift.Bob Wilson
2012-09-27Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. S...Sylvestre Ledru
2012-09-27Fix a typo 'iff' => 'if'Sylvestre Ledru
2012-09-25Merge commit 'bc4021f31eaa97ee52655828da3e3de14a39e4a6'Derek Schuff
2012-09-18Merge commit '8e70b5506ec0d7a6c2740bc89cd1b8f12a78b24f'Derek Schuff
2012-09-14Fix Doxygen issues:Dmitri Gribenko
2012-09-13This patch introduces A15 as a target in LLVM.Silviu Baranga
2012-09-04Patch to implement UMLAL/SMLAL instructions for the ARM architectureArnold Schwaighofer
2012-08-21Merge up to r162331, git commit bc363931085587bac42a40653962a3e5acd1ffceDerek Schuff
2012-08-18Remove the CAND/COR/CXOR custom ISD nodes and their select code.Jakob Stoklund Olesen
2012-08-15Add missing Rfalse operand to the predicated pseudo-instructions.Jakob Stoklund Olesen
2012-08-12Revert 161581: Patch to implement UMLAL/SMLAL instructions for the ARMArnold Schwaighofer
2012-08-09Patch to implement UMLAL/SMLAL instructions for the ARM architectureArnold Schwaighofer
2012-08-01Clean up formatting.Jim Grosbach
2012-08-01Tidy up.Jim Grosbach
2012-07-09LOCALMODs from hg 0b098ca44de7 against r158408 (hg 90a87d6bfe45)Derek Schuff
2012-05-24Make some opcode tables static and const. Allows code to avoid making copies ...Craig Topper
2012-04-26Test commit.Tim Northover
2012-04-11ARM 'vuzp.32 Dd, Dm' is a pseudo-instruction.Jim Grosbach
2012-04-11ARM 'vzip.32 Dd, Dm' is a pseudo-instruction.Jim Grosbach
2012-03-06ARM refactor more NEON VLD/VST instructions to use composite physregsJim Grosbach
2012-03-05ARM refactor away a bunch of VLD/VST pseudo instructions.Jim Grosbach
2012-02-23Remove unused variable.Duncan Sands
2012-02-23Optimize a couple of common patterns involving conditional moves where the falseEvan Cheng
2012-02-07Convert assert(0) to llvm_unreachableCraig Topper
2012-01-20More dead code removal (using -Wunreachable-code)David Blaikie
2012-01-10ARM updating VST2 pseudo-lowering fixed vs. register update.Jim Grosbach
2011-12-21ARM NEON assmebly parsing for VLD2 to all lanes instructions.Jim Grosbach
2011-12-14ARM NEON refactor VST2 w/ writeback instructions.Jim Grosbach
2011-12-09ARM assembly parsing and encoding for VLD2 with writeback.Jim Grosbach
2011-11-29ARM assembly parsing and encoding for four-register VST1.Jim Grosbach
2011-11-29ARM assembly parsing and encoding for three-register VST1.Jim Grosbach
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