| Age | Commit message (Expand) | Author |
|---|
| 2013-08-19 | Remove FlagNaClUseM23ArmAbi since M23 was a long time ago. | Jan Voung |
| 2013-01-11 | Merge commit '1ad9253c9d34ccbce3e7e4ea5d87c266cbf93410' | Derek Schuff |
| 2012-12-03 | Use the new script to sort the includes of every file under lib. | Chandler Carruth |
| 2012-11-14 | Use __aeabi_read_tp for non-nacl | David Sehr |
| 2012-11-13 | Merge commit 'be02a90de17f857ba65bbd8a11653ca1bad30adc' | Derek Schuff |
| 2012-11-06 | Mark the Int_eh_sjlj_dispatchsetup pseudo instruction as clobbering all | Chad Rosier |
| 2012-11-06 | Merge commit 'cfe09ed28d8a65b671e8b7a716a933e98e810e32' | Derek Schuff |
| 2012-10-31 | llvm: build with fewer warnings | Jan Voung |
| 2012-10-30 | Add ARM M23 under an option. | David Sehr |
| 2012-10-26 | Revert r163298 "Optimize codegen for VSETLNi{8,16,32} operating on Q registers." | Jakob Stoklund Olesen |
| 2012-10-04 | ARM: Add ldr r9 mode for TLS | David Sehr |
| 2012-09-25 | Merge commit 'bc4021f31eaa97ee52655828da3e3de14a39e4a6' | Derek Schuff |
| 2012-09-20 | Change enum type in a static table to uint8_t instead. Saves about 700 hundre... | Craig Topper |
| 2012-09-18 | Merge commit '8e70b5506ec0d7a6c2740bc89cd1b8f12a78b24f' | Derek Schuff |
| 2012-09-06 | Optimize codegen for VSETLNi{8,16,32} operating on Q registers. Degenerate to... | James Molloy |
| 2012-08-21 | Merge up to r162331, git commit bc363931085587bac42a40653962a3e5acd1ffce | Derek Schuff |
| 2012-08-17 | Merge commit 'c723eb1aef817d47feec620933ee1ec6005cdd14' | Derek Schuff |
| 2012-08-09 | Remove getARMRegisterNumbering and replace with calls into | Eric Christopher |
| 2012-07-09 | LOCALMODs from hg 0b098ca44de7 against r158408 (hg 90a87d6bfe45) | Derek Schuff |
| 2012-06-15 | Preserve <undef> flags in ARMExpandPseudo. | Jakob Stoklund Olesen |
| 2012-05-20 | Transfer memory operands to the right instruction. | Jakob Stoklund Olesen |
| 2012-03-27 | Remove unnecessary llvm:: qualifications | Craig Topper |
| 2012-03-26 | Prune includes and replace uses of ARMRegisterInfo.h with ARMBaeRegisterInfo.h | Craig Topper |
| 2012-03-11 | Use uint16_t to store registers and opcode in static tables in the target spe... | Craig Topper |
| 2012-03-06 | ARM refactor more NEON VLD/VST instructions to use composite physregs | Jim Grosbach |
| 2012-03-05 | ARM refactor away a bunch of VLD/VST pseudo instructions. | Jim Grosbach |
| 2012-02-18 | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu |
| 2012-01-20 | More dead code removal (using -Wunreachable-code) | David Blaikie |
| 2012-01-10 | ARM updating VST2 pseudo-lowering fixed vs. register update. | Jim Grosbach |
| 2011-12-22 | Add variants of the dispatchsetup pseudo for Thumb and !VFP. <rdar://10620138> | Bob Wilson |
| 2011-12-21 | ARM NEON assmebly parsing for VLD2 to all lanes instructions. | Jim Grosbach |
| 2011-12-21 | ARM NEON VLD2 assembly parsing for structure to all lanes, non-writeback. | Jim Grosbach |
| 2011-12-17 | Preserve more memory operands in ARMExpandPseudo. | Jakob Stoklund Olesen |
| 2011-12-15 | ARM NEON VTBL/VTBX assembly parsing and encoding. | Jim Grosbach |
| 2011-12-14 | ARM NEON refactor VST2 w/ writeback instructions. | Jim Grosbach |
| 2011-12-14 | ARM NEON VST2 assembly parsing and encoding. | Jim Grosbach |
| 2011-12-09 | ARM assembly parsing and encoding for VLD2 with writeback. | Jim Grosbach |
| 2011-11-30 | ARM parsing for VLD1 all lanes, with writeback. | Jim Grosbach |
| 2011-11-30 | ARM parsing for VLD1 two register all lanes, no writeback. | Jim Grosbach |
| 2011-11-29 | ARM assembly parsing and encoding for four-register VST1. | Jim Grosbach |
| 2011-11-29 | ARM assembly parsing and encoding for three-register VST1. | Jim Grosbach |
| 2011-11-16 | Fix ARM SjLj-EH dispatch setup code. <rdar://problem/10444602> | Bob Wilson |
| 2011-11-12 | Re-apply 144430, this time with the associated isel and disassmbler bits. | Jim Grosbach |
| 2011-10-31 | ARM VST1 w/ writeback assembly parsing and encoding. | Jim Grosbach |
| 2011-10-31 | ARM writeback vs. stride operands for VST/VLD. | Jim Grosbach |
| 2011-10-24 | Nuke dead code. Nothing generates the VLD1d64QPseudo_UPD instruction. | Jim Grosbach |
| 2011-10-24 | ARM assembly parsing and encoding for VLD1 w/ writeback. | Jim Grosbach |
| 2011-10-24 | ARM refactor am6offset usage for VLD1. | Jim Grosbach |
| 2011-10-21 | Assembly parsing for 4-register sequential variant of VLD2. | Jim Grosbach |
| 2011-10-21 | Assembly parsing for 2-register sequential variant of VLD2. | Jim Grosbach |
