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LLVM with the emscripten fastcomp javascript backend
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2010-05-21
Use MachineInstr::readsWritesVirtualRegister to determine if a register is read.
Jakob Stoklund Olesen
2010-05-21
Teach VirtRegRewriter to handle spilling in instructions that have multiple
Jakob Stoklund Olesen
2010-05-21
If the first definition of a virtual register is a partial redef, add an
Jakob Stoklund Olesen
2010-05-21
Rename -pre-RA-sched=hybrid to -pre-RA-sched=list-hybrid.
Evan Cheng
2010-05-21
Simplify.
Devang Patel
2010-05-20
Allow targets more controls on what nodes are scheduled by reg pressure, what...
Evan Cheng
2010-05-20
Refactor.
Devang Patel
2010-05-20
Remove dbg_value workaround and associated command line option
Jim Grosbach
2010-05-20
Split DbgVariable. Eventually, variable info will be communicated through fra...
Devang Patel
2010-05-20
Add a hybrid bottom up scheduler that reduce register usage while avoiding
Evan Cheng
2010-05-20
Fix typo in comment.
Nick Lewycky
2010-05-20
Partial code for emitting thread local bss data.
Eric Christopher
2010-05-19
Optimize away insertelement of an undef value. This shows up in
Bob Wilson
2010-05-19
Enable preserving debug information through post-RA scheduling
Jim Grosbach
2010-05-19
Fix the post-RA instruction scheduler to handle instructions referenced by
Jim Grosbach
2010-05-19
Code clean up.
Evan Cheng
2010-05-19
Revert r104165.
Devang Patel
2010-05-19
Add support for partial redefs to the fast register allocator.
Jakob Stoklund Olesen
2010-05-19
There is no need to maintain InsnsBeginScopeSet separately.
Devang Patel
2010-05-19
Add MachineInstr::readsVirtualRegister() in preparation for proper handling of
Jakob Stoklund Olesen
2010-05-19
Code refactoring: pull SchedPreference enum from TargetLowering.h to TargetMa...
Evan Cheng
2010-05-19
TwoAddressInstructionPass doesn't really know how to merge live intervals when
Jakob Stoklund Olesen
2010-05-19
When expanding a vector_shuffle, the element type may not be legal and may
Bob Wilson
2010-05-19
Intrinsics which do a vector compare (results are all zero or all ones) are m...
Evan Cheng
2010-05-18
Fix a crash when debugging the coalescer. DebugValue instructions are not
Bob Wilson
2010-05-18
Remember to update VirtRegLastUse when spilling without killing before a call.
Jakob Stoklund Olesen
2010-05-18
Sink dag combine's post index load / store code that swap base ptr and index ...
Evan Cheng
2010-05-18
Properly handle multiple definitions of a virtual register in the same
Jakob Stoklund Olesen
2010-05-18
Continuously refine the register class of REG_SEQUENCE def with all the sourc...
Evan Cheng
2010-05-18
Fix PR7162: Use source register classes and sub-indices to determine the corr...
Evan Cheng
2010-05-18
Teach the machine code verifier to use getSubRegisterRegClass().
Jakob Stoklund Olesen
2010-05-18
llc (et al): Add support for --show-encoding and --show-inst.
Daniel Dunbar
2010-05-18
FIX PR7158. SimplifyVBinOp was asserting when it fails to constant fold (op (...
Evan Cheng
2010-05-17
Fix PR7175. Insert copies of a REG_SEQUENCE source if it is used by other REG...
Evan Cheng
2010-05-17
- Set the "HasCalls" flag after instruction selection is finished.
Bill Wendling
2010-05-17
More data/parsing support for tls directives. Add a few more testcases
Eric Christopher
2010-05-17
Fix PR7156. If the sources of a REG_SEQUENCE are all IMPLICIT_DEF's. Replace ...
Evan Cheng
2010-05-17
Pull the UsedInInstr.test() calls into calcSpillCost() and remember aliases.
Jakob Stoklund Olesen
2010-05-17
Add some section and constant support for darwin TLS.
Eric Christopher
2010-05-17
Careful with reg_sequence coalescing to not to overwrite sub-register indices.
Evan Cheng
2010-05-17
Remove debug option. Add comment on spill order determinism.
Jakob Stoklund Olesen
2010-05-17
Avoid allocating the same physreg to multiple virtregs in one instruction.
Jakob Stoklund Olesen
2010-05-17
Minor optimizations. DenseMap::begin() is surprisingly slow on an empty map.
Jakob Stoklund Olesen
2010-05-17
Extract spill cost calculation to a new method, and use definePhysReg() to clear
Jakob Stoklund Olesen
2010-05-17
Remove unused member variable.
Zhongxing Xu
2010-05-17
Only use clairvoyance when defining a register, and then only if it has one use.
Jakob Stoklund Olesen
2010-05-17
Eliminate a hash table probe when killing virtual registers.
Jakob Stoklund Olesen
2010-05-17
Execute virtreg kills immediately instead of after processing all uses.
Jakob Stoklund Olesen
2010-05-17
Sprinkle superregister <imp-def> and <imp-kill> operands when dealing with su...
Jakob Stoklund Olesen
2010-05-17
Now that we don't keep live registers across calls, there is not reason to go
Jakob Stoklund Olesen
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