| Age | Commit message (Expand) | Author |
|---|
| 2012-03-27 | fix what looks like a real logic bug, found by PVS-Studio (part of PR12357) | Chris Lattner |
| 2012-03-26 | Add a debug statement. | Eric Christopher |
| 2012-03-24 | Add the ability to promote legal integer VAARGs. This is required for the PPC... | Hal Finkel |
| 2012-03-22 | Source order scheduler should not preschedule nodes with multiple uses. rdar:... | Evan Cheng |
| 2012-03-22 | Assign node orders to target intrinsics which do not produce results. rdar://... | Evan Cheng |
| 2012-03-22 | [fast-isel] Fold "urem x, pow2" -> "and x, pow2-1". This should fix the 271% | Chad Rosier |
| 2012-03-21 | Checking a build_vector for an all-ones value. | Jim Grosbach |
| 2012-03-20 | When combining (vextract shuffle (load ), <1,u,u,u>), 0) -> (load ), add user... | Craig Topper |
| 2012-03-20 | Do everything up to generating code to try to get a register for | Eric Christopher |
| 2012-03-20 | Untabify. | Eric Christopher |
| 2012-03-20 | Add another debugging statement here. | Eric Christopher |
| 2012-03-20 | Use lookUpRegForValue here instead of duplicating the code. | Eric Christopher |
| 2012-03-19 | f16 FDIV can now be legalized by promoting to f32 | Pete Cooper |
| 2012-03-19 | Fix DAG combine which creates illegal vector shuffles. Patch by Heikki Kultala. | Duncan Sands |
| 2012-03-16 | Revert r152613 (and r152614), "Inline the d'tor and add an anchor instead." f... | NAKAMURA Takumi |
| 2012-03-15 | We actually handle AllocaInst via getRegForValue below just fine. | Eric Christopher |
| 2012-03-15 | Add some debugging output into fast isel as well. | Eric Christopher |
| 2012-03-15 | Add another debug statement. | Eric Christopher |
| 2012-03-15 | When optimizing certain BUILD_VECTOR nodes into other BUILD_VECTOR nodes, add... | Nadav Rotem |
| 2012-03-15 | Add a xform to the DAG combiner. | Bill Wendling |
| 2012-03-14 | Insert the debugging instructions in one fell-swoop so that it doesn't call the | Bill Wendling |
| 2012-03-13 | Fortify r152675 a bit. Although I'm not able to come up with a test case that... | Evan Cheng |
| 2012-03-13 | DAG combine incorrectly optimize (i32 vextract (v4i16 load $addr), c) to | Evan Cheng |
| 2012-03-13 | Add a return type. | Bill Wendling |
| 2012-03-13 | Inline the d'tor and add an anchor instead. | Bill Wendling |
| 2012-03-13 | Refactor the SelectionDAG's 'dump' methods into their own .cpp file. | Bill Wendling |
| 2012-03-11 | llvm::SwitchInst | Stepan Dyatkovskiy |
| 2012-03-10 | Give dagcombiner's worklist some inline capacity. | Benjamin Kramer |
| 2012-03-08 | Use uint16_t to store instruction implicit uses and defs. Reduces static data. | Craig Topper |
| 2012-03-08 | Taken into account Duncan's comments for r149481 dated by 2nd Feb 2012: | Stepan Dyatkovskiy |
| 2012-03-07 | misched preparation: rename core scheduler methods for consistency. | Andrew Trick |
| 2012-03-07 | misched preparation: clarify ScheduleDAG and ScheduleDAGInstrs roles. | Andrew Trick |
| 2012-03-07 | misched preparation: modularize schedule emission. | Andrew Trick |
| 2012-03-07 | misched preparation: modularize schedule printing. | Andrew Trick |
| 2012-03-07 | misched preparation: modularize schedule verification. | Andrew Trick |
| 2012-03-07 | whitespace | Andrew Trick |
| 2012-03-07 | Cleanup in preparation for misched: Move DAG visualization logic. | Andrew Trick |
| 2012-03-07 | whitespace | Andrew Trick |
| 2012-03-07 | Cleanup: DAG building is specific to either SD or MI scheduling. Not part of ... | Andrew Trick |
| 2012-03-06 | Extend r148086 to check for [r +/- reg] address mode. This fixes queens perfo... | Evan Cheng |
| 2012-03-06 | Make it possible for a target to mark FSUB as Expand. This requires providin... | Owen Anderson |
| 2012-03-05 | Fix warnings about adding a bool to a string. | Bill Wendling |
| 2012-03-04 | Use uint16_t to store register overlaps to reduce static data. | Craig Topper |
| 2012-03-01 | Fix a codegen fault in which log2 or exp2 could be dead-code eliminated even ... | James Molloy |
| 2012-02-29 | LegalizeIntegerTypes: Reorder operations in the "big shift by small amount" o... | Benjamin Kramer |
| 2012-02-28 | Re-commit r151623 with fix. Only issue special no-return calls if it's a dire... | Evan Cheng |
| 2012-02-28 | Fix off-by one in comment. | Benjamin Kramer |
| 2012-02-28 | LegalizeIntegerTypes: Reenable the large shift with small amount optimization. | Benjamin Kramer |
| 2012-02-28 | Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack pre... | Daniel Dunbar |
| 2012-02-28 | Code cleanup following CR by Duncan. | Nadav Rotem |
