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2013-07-15Merge commit '7dfcb84fc16b3bf6b2379713b53090757f0a45f9'Eli Bendersky
Conflicts: docs/LangRef.rst include/llvm/CodeGen/CallingConvLower.h include/llvm/IRReader/IRReader.h include/llvm/Target/TargetMachine.h lib/CodeGen/CallingConvLower.cpp lib/IRReader/IRReader.cpp lib/IRReader/LLVMBuild.txt lib/IRReader/Makefile lib/LLVMBuild.txt lib/Makefile lib/Support/MemoryBuffer.cpp lib/Support/Unix/PathV2.inc lib/Target/ARM/ARMBaseInstrInfo.cpp lib/Target/ARM/ARMISelLowering.cpp lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/ARMSubtarget.cpp lib/Target/ARM/ARMTargetMachine.cpp lib/Target/Mips/CMakeLists.txt lib/Target/Mips/MipsDelaySlotFiller.cpp lib/Target/Mips/MipsISelLowering.cpp lib/Target/Mips/MipsInstrInfo.td lib/Target/Mips/MipsSubtarget.cpp lib/Target/Mips/MipsSubtarget.h lib/Target/X86/X86FastISel.cpp lib/Target/X86/X86ISelDAGToDAG.cpp lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86InstrControl.td lib/Target/X86/X86InstrFormats.td lib/Transforms/IPO/ExtractGV.cpp lib/Transforms/InstCombine/InstCombineCompares.cpp lib/Transforms/Utils/SimplifyLibCalls.cpp test/CodeGen/X86/fast-isel-divrem.ll test/MC/ARM/data-in-code.ll tools/Makefile tools/llvm-extract/llvm-extract.cpp tools/llvm-link/CMakeLists.txt tools/opt/CMakeLists.txt tools/opt/LLVMBuild.txt tools/opt/Makefile tools/opt/opt.cpp
2013-04-30Temporarily revert "Change the informal convention of DBG_VALUE so that we ↵Adrian Prantl
can express a" because it breaks some buildbots. This reverts commit 180816. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180819 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-30Change the informal convention of DBG_VALUE so that we can express aAdrian Prantl
register-indirect address with an offset of 0. It used to be that a DBG_VALUE is a register-indirect value if the offset (operand 1) is nonzero. The new convention is that a DBG_VALUE is register-indirect if the first operand is a register and the second operand is an immediate. For plain registers use the combination reg, reg. rdar://problem/13658587 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180816 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19Move TryToFoldFastISelLoad to FastISel, where it belongs. In general, I'mEli Bendersky
trying to move as much FastISel logic as possible out of the main path in SelectionDAGISel - intermixing them just adds confusion. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179902 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19ArrayRefize getMachineNode(). No functionality change.Michael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179901 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19Use dbgs() consistently for -debug printoutsEli Bendersky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179894 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19Add some more stats for fast isel vs. SelectionDAG, w.r.t lowering functionEli Bendersky
arguments in entry BBs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179824 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-20Move SDNode order propagation to SDNodeOrdering, which also fixes a missedJustin Holewinski
case of order propagation during isel. Thanks Owen for the suggestion! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177525 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-20Propagate DAG node ordering during type legalization and instruction selectionJustin Holewinski
A node's ordering is only propagated during legalization if (a) the new node does not have an ordering (is not a CSE'd node), or (b) the new node has an ordering that is higher than the node being legalized. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177465 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-13Reset some of the target options which affect code generation.Bill Wendling
This doesn't reset all of the target options within the TargetOptions object. This is because some of those are ABI-specific and must be determined if it's okay to change those on the fly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176986 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-11Merge commit '279b9184c2ff4fea93b198a3519b8cb3a1d8d195'Eli Bendersky
Conflicts: include/llvm/CodeGen/LexicalScopes.h include/llvm/MC/MCAsmInfo.h lib/Linker/LinkArchives.cpp lib/Linker/LinkItems.cpp lib/MC/MCAsmInfo.cpp lib/MC/MCDwarf.cpp lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/ARMSubtarget.cpp lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp lib/Target/Mips/MipsAsmPrinter.cpp lib/Target/Mips/MipsDelaySlotFiller.cpp lib/Target/Mips/MipsISelDAGToDAG.cpp lib/Target/Mips/MipsSubtarget.cpp lib/Target/Mips/MipsSubtarget.h lib/Target/Mips/MipsTargetObjectFile.cpp lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp lib/Target/X86/X86FastISel.cpp lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86TargetMachine.cpp lib/Transforms/CMakeLists.txt lib/Transforms/LLVMBuild.txt lib/Transforms/Makefile test/MC/ARM/arm_instructions.s test/MC/X86/AlignedBundling/pad-align-to-bundle-end.s
2013-03-08Disable statistics on Release builds and move tests that depend on -stats.Jan Wen Voung
Summary: Statistics are still available in Release+Asserts (any +Asserts builds), and stats can also be turned on with LLVM_ENABLE_STATS. Move some of the FastISel stats that were moved under DEBUG() back out of DEBUG(), since stats are disabled across the board now. Many tests depend on grepping "-stats" output. Move those into a orig_dir/Stats/. so that they can be marked as unsupported when building without statistics. Differential Revision: http://llvm-reviews.chandlerc.com/D486 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176733 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-07ArrayRefize some code. No functionality change.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176648 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-07No need to go through int64 and APInt when generating a new constant.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176615 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01Remove duplicate line and move another closer to its actual useEli Bendersky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176391 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-28A small refactoring + adding comments.Eli Bendersky
SelectionDAGIsel::LowerArguments needs a function, not a basic block. So it makes sense to pass it the function instead of extracting a basic-block from the function and then tossing it. This is also more self-documenting (functions have arguments, BBs don't). In addition, added comments to a couple of Select* methods. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176305 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-27Remove unnecessary cast to void.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176222 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-27Silence the unused variable warning. Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176218 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-27The FastISEL should be fast. But when we record statistics we use atomic ↵Nadav Rotem
operations to increment the counters. This patch disables the counters on non-debug builds. This reduces the runtime of SelectionDAGISel::SelectCodeCommon by ~5%. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176214 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25Fix wording.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176055 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25[fast-isel] Add X86FastIsel::FastLowerArguments to handle functions with 6 orChad Rosier
fewer scalar integer (i32 or i64) arguments. It completely eliminates the need for SDISel for trivial functions. Also, add the new llc -fast-isel-abort-args option, which is similar to -fast-isel-abort option, but for formal argument lowering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176052 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-18[ms-inline asm] Remove a redundant call to the setHasMSInlineAsm function.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175456 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-18[ms-inline asm] Fix undefined behavior to reset hasMSInlineAsm in advance of ↵NAKAMURA Takumi
SelectAllBasicBlocks(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175422 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-16[ms-inline asm] Do not omit the frame pointer if we have ms-inline assembly.Chad Rosier
If the frame pointer is omitted, and any stack changes occur in the inline assembly, e.g.: "pusha", then any C local variable or C argument references will be incorrect. I pass no judgement on anyone who would do such a thing. ;) rdar://13218191 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175334 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-15Use the 'target-features' and 'target-cpu' attributes to reset the subtarget ↵Bill Wendling
features. If two functions require different features (e.g., `-mno-sse' vs. `-msse') then we want to honor that, especially during LTO. We can do that by resetting the subtarget's features depending upon the 'target-feature' attribute. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175314 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11Currently, codegen may spent some time in SDISel passes even if an entireEvan Cheng
function is successfully handled by fast-isel. That's because function arguments are *always* handled by SDISel. Introduce FastLowerArguments to allow each target to provide hook to handle formal argument lowering. As a proof-of-concept, add ARMFastIsel::FastLowerArguments to handle functions with 4 or fewer scalar integer (i8, i16, or i32) arguments. It completely eliminates the need for SDISel for trivial functions. rdar://13163905 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174855 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-30Merge commit 'a662a9862501fc86904e90054f7c1519101d9126'Derek Schuff
Conflicts: include/llvm/CodeGen/IntrinsicLowering.h include/llvm/MC/MCAssembler.h include/llvm/MC/MCObjectStreamer.h lib/LLVMBuild.txt lib/Linker/LinkArchives.cpp lib/MC/MCAssembler.cpp lib/MC/MCELFStreamer.cpp lib/MC/MCParser/AsmParser.cpp lib/MC/MCPureStreamer.cpp lib/MC/WinCOFFStreamer.cpp lib/Makefile lib/Support/Unix/Memory.inc lib/Support/Unix/Process.inc lib/Support/Unix/Program.inc lib/Target/ARM/ARM.h lib/Target/ARM/ARMFastISel.cpp lib/Target/ARM/ARMISelLowering.cpp lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp lib/Target/Mips/MipsInstrFPU.td lib/Target/X86/CMakeLists.txt lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86TargetMachine.cpp lib/Target/X86/X86TargetObjectFile.cpp lib/Transforms/InstCombine/InstCombineCalls.cpp test/CodeGen/X86/fast-isel-x86-64.ll tools/llc/llc.cpp tools/lto/LTOModule.cpp utils/TableGen/EDEmitter.cpp
2013-01-11Merge commit '1ad9253c9d34ccbce3e7e4ea5d87c266cbf93410'Derek Schuff
deplib features commented out due to removal upstream; will add back as a localmod Conflicts: include/llvm/ADT/Triple.h include/llvm/MC/MCAssembler.h include/llvm/Target/TargetFrameLowering.h lib/CodeGen/AsmPrinter/DwarfDebug.cpp lib/CodeGen/AsmPrinter/DwarfDebug.h lib/CodeGen/BranchFolding.cpp lib/LLVMBuild.txt lib/Linker/LinkArchives.cpp lib/MC/MCAssembler.cpp lib/MC/MCELFStreamer.cpp lib/Makefile lib/Target/ARM/ARMExpandPseudoInsts.cpp lib/Target/ARM/ARMFrameLowering.cpp lib/Target/ARM/ARMISelLowering.cpp lib/Target/ARM/ARMSubtarget.h lib/Target/ARM/ARMTargetObjectFile.cpp lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp lib/Target/Mips/MipsInstrFPU.td lib/Target/Mips/MipsInstrInfo.td lib/Target/X86/X86CodeEmitter.cpp lib/Target/X86/X86Subtarget.h lib/VMCore/Module.cpp test/MC/MachO/ARM/nop-armv4-padding.s tools/Makefile tools/llc/llc.cpp tools/lto/LTOModule.cpp tools/lto/lto.cpp
2013-01-07Move TargetTransformInfo to live under the Analysis library. This noChandler Carruth
longer would violate any dependency layering and it is in fact an analysis. =] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171686 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-05Funnel the actual TargetTransformInfo pass from the SelectionDAGISelChandler Carruth
pass into the SelectionDAG itself rather than snooping on the implementation of that pass as exposed by the TargetMachine. This removes the last direct client of the ScalarTargetTransformInfo class outside of the TTI pass implementation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171625 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-02Move all of the header files which are involved in modelling the LLVM IRChandler Carruth
into their new header subdirectory: include/llvm/IR. This matches the directory structure of lib, and begins to correct a long standing point of file layout clutter in LLVM. There are still more header files to move here, but I wanted to handle them in separate commits to make tracking what files make sense at each layer easier. The only really questionable files here are the target intrinsic tablegen files. But that's a battle I'd rather not fight today. I've updated both CMake and Makefile build systems (I think, and my tests think, but I may have missed something). I've also re-sorted the includes throughout the project. I'll be committing updates to Clang, DragonEgg, and Polly momentarily. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171366 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20Use MachineInstrBuilder for PHI nodes in SelectionDAGISel.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170716 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11Fall back to the selection dag isel to select tail calls.Chad Rosier
This shouldn't affect codegen for -O0 compiles as tail call markers are not emitted in unoptimized compiles. Testing with the external/internal nightly test suite reveals no change in compile time performance. Testing with -O1, -O2 and -O3 with fast-isel enabled did not cause any compile-time or execution-time failures. All tests were performed on my x86 machine. I'll monitor our arm testers to ensure no regressions occur there. In an upcoming clang patch I will be marking the objc_autoreleaseReturnValue and objc_retainAutoreleaseReturnValue as tail calls unconditionally. While it's theoretically true that this is just an optimization, it's an optimization that we very much want to happen even at -O0, or else ARC applications become substantially harder to debug. Part of rdar://12553082 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169796 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04Use dyn_cast instead of isa and cast. No functionality change.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169196 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03Use the new script to sort the includes of every file under lib.Chandler Carruth
Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27Merge commit '8d20b5f9ff609e70fae5c865931ab0f29e639d9c'Derek Schuff
Conflicts: lib/CodeGen/AsmPrinter/DwarfDebug.cpp lib/CodeGen/AsmPrinter/DwarfDebug.h lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp lib/Target/Mips/MipsISelDAGToDAG.cpp lib/Target/Mips/MipsInstrFPU.td lib/Target/Mips/MipsSubtarget.cpp lib/Target/Mips/MipsSubtarget.h lib/Target/X86/X86MCInstLower.cpp tools/Makefile tools/llc/llc.cpp
2012-11-13misched: Allow subtargets to enable misched and dependent options.Andrew Trick
This allows me to begin enabling (or backing out) misched by default for one subtarget at a time. To run misched we typically want to: - Disable SelectionDAG scheduling (use the source order scheduler) - Enable more aggressive coalescing (until we decide to always run the coalescer this way) - Enable MachineScheduler pass itself. Disabling PostRA sched may follow for some subtargets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167826 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Merge commit '320db3f8052c9f506d9ea043ba5da534df40aa08'Derek Schuff
2012-10-15Freeze the reserved registers as soon as isel is complete.Jakob Stoklund Olesen
Also provide an MRI::getReservedRegs() function to access the frozen register set, and isReserved() and isAllocatable() methods to test individual registers. The various implementations of TRI::getReservedRegs() are quite complicated, and many passes need to look at the reserved register set. This patch makes it possible for these passes to use the cached copy in MRI, avoiding a lot of malloc traffic and repeated calculations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165982 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-25Merge commit 'bc4021f31eaa97ee52655828da3e3de14a39e4a6'Derek Schuff
Conflicts: lib/MC/MCAssembler.cpp lib/Target/ARM/ARMISelDAGToDAG.cpp lib/Target/Mips/MipsInstrFPU.td lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp lib/Target/X86/X86ISelLowering.h
2012-09-18Merge commit '8e70b5506ec0d7a6c2740bc89cd1b8f12a78b24f'Derek Schuff
Conflicts: include/llvm/CodeGen/ISDOpcodes.h include/llvm/Target/Target.td include/llvm/Target/TargetLowering.h include/llvm/Target/TargetOpcodes.h lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp lib/Target/Mips/MipsMCInstLower.cpp utils/TableGen/CodeGenTarget.cpp
2012-09-16Fix bad comment. No functional change.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164000 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06Add a new optimization pass: Stack Coloring, that merges disjoint static ↵Nadav Rotem
allocations (allocas). Allocas are known to be disjoint if they are marked by disjoint lifetime markers (@llvm.lifetime.XXX intrinsics). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163299 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-24BranchProb: modify the definition of an edge in BranchProbabilityInfo to handleManman Ren
the case of multiple edges from one block to another. A simple example is a switch statement with multiple values to the same destination. The definition of an edge is modified from a pair of blocks to a pair of PredBlock and an index into the successors. Also set the weight correctly when building SelectionDAG from LLVM IR, especially when converting a Switch. IntegersSubsetMapping is updated to calculate the weight for each cluster. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162572 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-22Add a getName function to MachineFunction. Use it in places that previously ↵Craig Topper
did getFunction()->getName(). Remove includes of Function.h that are no longer needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162347 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-21Merge up to r162331, git commit bc363931085587bac42a40653962a3e5acd1ffceDerek Schuff
2012-08-17Merge commit 'c723eb1aef817d47feec620933ee1ec6005cdd14'Derek Schuff
This merges r159618 from upstream into master. It goes with clang rev af50aab0c317462129d73ae8000c6394c718598d Conflicts: include/llvm/CodeGen/LexicalScopes.h include/llvm/Target/TargetOptions.h lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp lib/Target/ARM/ARMBaseInstrInfo.cpp lib/Target/ARM/ARMTargetMachine.cpp lib/Target/ARM/ARMTargetObjectFile.cpp lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp lib/Target/Mips/MipsISelDAGToDAG.cpp lib/Target/Mips/MipsInstrFPU.td lib/Target/Mips/MipsMCInstLower.cpp lib/Target/Mips/MipsTargetMachine.cpp lib/Target/TargetMachine.cpp lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86RegisterInfo.cpp lib/Target/X86/X86TargetObjectFile.cpp lib/Target/X86/X86TargetObjectFile.h tools/llc/llc.cpp (tools/llc/llc.cpp is from a merged version of r160532 because it was a bit hairy and I didn't want to redo it.)
2012-08-03Fall back to selection DAG isel for calls to builtin functions.Bob Wilson
Fast isel doesn't currently have support for translating builtin function calls to target instructions. For embedded environments where the library functions are not available, this is a matter of correctness and not just optimization. Most of this patch is just arranging to make the TargetLibraryInfo available in fast isel. <rdar://problem/12008746> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161232 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-13Provide function name in 'Cannot select' fatal error.Jim Grosbach
When dumping the DAG for a fatal 'Cannot select' back-end error, also provide the name of the function the construct is in. Useful when dealing with large testcases, as the next step is to llvm-extract the function in question to get a small(er) testcase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160152 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-09LOCALMODs from hg 0b098ca44de7 against r158408 (hg 90a87d6bfe45)Derek Schuff
(only non-new files; new files in git 4f429c8b) Change-Id: Ia39f818088485bd90e4d048db404f8d6ba5f836b
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2025-05-03 10:35:53 +0000