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path: root/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
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2010-09-21correct this logic.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114474 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21just like they can opt into getting the root of the pattern beingChris Lattner
matched, allow ComplexPatterns to opt into getting the parent node of the operand being matched. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114472 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-05implement rdar://6653118 - fastisel should fold loads where possible.Chris Lattner
Since mem2reg isn't run at -O0, we get a ton of reloads from the stack, for example, before, this code: int foo(int x, int y, int z) { return x+y+z; } used to compile into: _foo: ## @foo subq $12, %rsp movl %edi, 8(%rsp) movl %esi, 4(%rsp) movl %edx, (%rsp) movl 8(%rsp), %edx movl 4(%rsp), %esi addl %edx, %esi movl (%rsp), %edx addl %esi, %edx movl %edx, %eax addq $12, %rsp ret Now we produce: _foo: ## @foo subq $12, %rsp movl %edi, 8(%rsp) movl %esi, 4(%rsp) movl %edx, (%rsp) movl 8(%rsp), %edx addl 4(%rsp), %edx ## Folded load addl (%rsp), %edx ## Folded load movl %edx, %eax addq $12, %rsp ret Fewer instructions and less register use = faster compiles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113102 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26zap dead code.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112155 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-06Reapply r110396, with fixes to appease the Linux buildbot gods.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110460 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-06Revert r110396 to fix buildbots.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110410 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-05Don't use PassInfo* as a type identifier for passes. Instead, use the ↵Owen Anderson
address of the static ID member as the sole unique type identifier. Clean up APIs related to this change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110396 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-24Add an ILP scheduler. This is a register pressure aware scheduler that'sEvan Cheng
appropriate for targets without detailed instruction iterineries. The scheduler schedules for increased instruction level parallelism in low register pressure situation; it schedules to reduce register pressure when the register pressure becomes high. On x86_64, this is a win for all tests in CFP2000. It also sped up 256.bzip2 by 16%. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109300 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22mass elimination of reliance on automatic iterator dereferencingGabor Greif
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109103 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-16Use the source-order scheduler instead of the "fast" scheduler at -O0,Dan Gohman
because it's more likely to keep debug line information in its original order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108496 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10Reapply bottom-up fast-isel, with several fixes for x86-32:Dan Gohman
- Check getBytesToPopOnReturn(). - Eschew ST0 and ST1 for return values. - Fix the PIC base register initialization so that it doesn't ever fail to end up the top of the entry block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108039 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09Clarify what mysterious check means.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108005 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09--- Reverse-merging r107947 into '.':Bob Wilson
U utils/TableGen/FastISelEmitter.cpp --- Reverse-merging r107943 into '.': U test/CodeGen/X86/fast-isel.ll U test/CodeGen/X86/fast-isel-loads.ll U include/llvm/Target/TargetLowering.h U include/llvm/Support/PassNameParser.h U include/llvm/CodeGen/FunctionLoweringInfo.h U include/llvm/CodeGen/CallingConvLower.h U include/llvm/CodeGen/FastISel.h U include/llvm/CodeGen/SelectionDAGISel.h U lib/CodeGen/LLVMTargetMachine.cpp U lib/CodeGen/CallingConvLower.cpp U lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp U lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp U lib/CodeGen/SelectionDAG/FastISel.cpp U lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp U lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp U lib/CodeGen/SelectionDAG/InstrEmitter.cpp U lib/CodeGen/SelectionDAG/TargetLowering.cpp U lib/Target/XCore/XCoreISelLowering.cpp U lib/Target/XCore/XCoreISelLowering.h U lib/Target/X86/X86ISelLowering.cpp U lib/Target/X86/X86FastISel.cpp U lib/Target/X86/X86ISelLowering.h git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107987 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09Re-apply bottom-up fast-isel, with fixes. Be very careful to avoid emittingDan Gohman
a DBG_VALUE after a terminator, or emitting any instructions before an EH_LABEL. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107943 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-08Extension of r107506. Make sure that we don't mark a function as having a callBill Wendling
if the inline ASM doesn't need a stack frame. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107922 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-08Revert 107840 107839 107813 107804 107800 107797 107791.Dan Gohman
Debug info intrinsics win for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107850 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-07Fix -fast-isel-abort to check the right instruction.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107839 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-07Implement bottom-up fast-isel. This has the advantage of not requiringDan Gohman
a separate DCE pass over MachineInstrs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107804 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-07Update the insert position after scheduling, which may change theDan Gohman
position when emitting multiple blocks when executing a custom inserter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107797 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-07Give FunctionLoweringInfo an MBB member, avoiding the need to pass itDan Gohman
around everywhere, and also give it an InsertPt member, to enable isel to operate at an arbitrary position within a block, rather than just appending to a block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107791 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-07Simplify FastISel's constructor by giving it a FunctionLoweringInfoDan Gohman
instance, rather than pointers to all of FunctionLoweringInfo's members. This eliminates an NDEBUG ABI sensitivity. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107789 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-07Move FunctionLoweringInfo.h out into include/llvm/CodeGen. This willDan Gohman
allow target-specific fast-isel code to make use of it directly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107787 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-06CanLowerReturn doesn't need a SelectionDAG; it just needs an LLVMContext.Dan Gohman
SelectBasicBlock doesn't needs its BasicBlock argument. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107712 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-04Proper indentation.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107581 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-02Propagate the AlignStack bit in InlineAsm's to the Dale Johannesen
PrologEpilog code, and use it to determine whether the asm forces stack alignment or not. gcc consistently does not do this for GCC-style asms; Apple gcc inconsistently sometimes does it for asm blocks. There is no convenient place to put a bit in either the SDNode or the MachineInstr form, so I've added an extra operand to each; unlovely, but it does allow for expansion for more bits, should we need it. PR 5125. Some existing testcases are affected. The operand lists of the SDNode and MachineInstr forms are indexed with awesome mnemonics, like "2"; I may fix this someday, but not now. I'm not making it any worse. If anyone is inspired I think you can find all the right places from this patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107506 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-02Rename CreateReg to CreateRegs, and MakeReg to CreateReg.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107451 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01Temporarily disable on-demand fast-isel.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107393 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01Use FuncInfo's isExportedInst accessor method instead ofDan Gohman
doing the work manually. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107384 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01Rename CreateRegForValue to CreateReg, and change its argumentDan Gohman
from a Value to a Type, because it doesn't actually care about the Value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107383 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01Enable on-demand fast-isel.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107377 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24Reapply r106634, now that the bug it exposed is fixed.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106746 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23Revert r106263, "Fold the ShrinkDemandedOps pass into the regular ↵Daniel Dunbar
DAGCombiner pass,"... it was causing both 'file' (with clang) and 176.gcc (with llvm-gcc) to be miscompiled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106634 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Minor code simplifications.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106286 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Give NamedRegionTimer an Enabled flag, allowing all its clients toDan Gohman
switch from this: if (TimePassesIsEnabled) { NamedRegionTimer T(Name, GroupName); do_something(); } else { do_something(); // duplicate the code, this time without a timer! } to this: { NamedRegionTimer T(Name, GroupName, TimePassesIsEnabled); do_something(); } git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106285 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass,Dan Gohman
which is faster, simpler, and less surprising. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106263 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-29SelectionDAG shouldn't have a FunctionLoweringInfo member. RegsForValueDan Gohman
shouldn't have a TargetLoweringInfo member. And FunctionLoweringInfo::set doesn't needs its EnableFastISel argument. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105101 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26Add FIXME comment to remove this.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104749 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26Add "setjmp_syscall", "savectx", "qsetjmp", "vfork", "getcontext" to the list ofBill Wendling
usual suspects that could "return twice". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104737 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26Update debug info when live-in reg is copied into a vreg.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104732 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26Move the check for "calls setjmp" to SelectionDAGISel so that it can be used byBill Wendling
more than just the stack slot coloring algorithm. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104722 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26Temporarily revert r104655 as it's breaking the bots.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104664 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26Dale and Evan suggested putting the "check for setjmp" much earlier in theBill Wendling
machine code generation. That's a good idea, so I made it so. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104655 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-20Add a hybrid bottom up scheduler that reduce register usage while avoidingEvan Cheng
pipeline stall. It's useful for targets like ARM cortex-a8. NEON has a lot of long latency instructions so a strict register pressure reduction scheduler does not work well. Early experiments show this speeds up some NEON loops by over 30%. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104216 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-19Code refactoring: pull SchedPreference enum from TargetLowering.h to ↵Evan Cheng
TargetMachine.h and put it in its own namespace. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104147 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17- Set the "HasCalls" flag after instruction selection is finished.Bill Wendling
- Change the logic DisableFramePointerElim() to check for the -disable-non-leaf-fp-elim before -disable-fp-elim. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103990 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-14Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe whatBill Wendling
the variable actually tracks. N.B., several back-ends are using "HasCalls" as being synonymous for something that adjusts the stack. This isn't 100% correct and should be looked into. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103802 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-04Instruction selection optimizations may have moved the def of a function ↵Evan Cheng
argument out of the entry block. rdar://7937489 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102993 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-01Remove the code for special-casing byval for fast-isel. SelectionDAGDan Gohman
handles argument lowering anyway, so there's no need for special casing here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102828 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-01Fix whitespace.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102817 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-01Reorgnaize more switch code lowering to clean up some trickyDan Gohman
code, and to eliminate the need for the SelectionDAGBuilder state to be live during CodeGenAndEmitDAG calls. Call SDB->clear() before CodeGenAndEmitDAG calls instead of before it, and move the CurDAG->clear() out of SelectionDAGBuilder, which doesn't own the DAG, and into CodeGenAndEmitDAG. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102814 91177308-0d34-0410-b5e6-96231b3b80d8
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