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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27182 91177308-0d34-0410-b5e6-96231b3b80d8
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manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
search tree of basic blocks. The new approach has several advantages:
it is faster, it generates significantly smaller code in many cases, and
it paves the way for implementing dense switch tables as a jump table by
handling switches directly in the instruction selector.
This functionality is currently only enabled on x86, but should be safe for
every target. In anticipation of making it the default, the cfg is now
properly updated in the x86, ppc, and sparc select lowering code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27156 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27155 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27089 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27063 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27035 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26988 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26965 91177308-0d34-0410-b5e6-96231b3b80d8
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casts between legal vector types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26961 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26928 91177308-0d34-0410-b5e6-96231b3b80d8
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Note that this code won't work for vectors that aren't legal on the
target. Improvements coming.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26925 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26849 91177308-0d34-0410-b5e6-96231b3b80d8
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Allow*BUILD_VECTOR to take variable inputs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26847 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26845 91177308-0d34-0410-b5e6-96231b3b80d8
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things.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26840 91177308-0d34-0410-b5e6-96231b3b80d8
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Make the PPC backend not dependent on BRTWOWAY_CC and make the branch
selector smarter about the code it generates, fixing a case in the
readme.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26814 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26811 91177308-0d34-0410-b5e6-96231b3b80d8
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illegal vector types yet!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26799 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26798 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26788 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26729 91177308-0d34-0410-b5e6-96231b3b80d8
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off the result string at the first null terminator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26704 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26701 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26692 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26659 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26616 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26608 91177308-0d34-0410-b5e6-96231b3b80d8
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targets can implement them. Make the top-down scheduler non-g5-specific.
Remove the old testing hazard recognizer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26569 91177308-0d34-0410-b5e6-96231b3b80d8
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function of the top-down scheduler are completely bogus currently, and
having (future) PPC specific in this file is also wrong, but this is a
small incremental step.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26552 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26542 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26504 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26479 91177308-0d34-0410-b5e6-96231b3b80d8
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PR709, and paving the way for future progress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26476 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26436 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26410 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26351 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26350 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26346 91177308-0d34-0410-b5e6-96231b3b80d8
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to inline asms. Mark some methods const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26334 91177308-0d34-0410-b5e6-96231b3b80d8
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several bugs in inline asm expanded operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26332 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26318 91177308-0d34-0410-b5e6-96231b3b80d8
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a single register number. This fully implements promotion for inline asms,
expand is close but not quite right yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26316 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26308 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26306 91177308-0d34-0410-b5e6-96231b3b80d8
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turns out not to point to a constant string but it forgot change the offset
back.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26242 91177308-0d34-0410-b5e6-96231b3b80d8
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We do not want to emit "Loop: ... brcond Out; br Loop", as it adds an extra
instruction in the loop. Instead, invert the condition and emit
"Loop: ... br!cond Loop; br Out.
Generalize the fix by moving it from PPCDAGToDAGISel to SelectionDAGLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26231 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26221 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26219 91177308-0d34-0410-b5e6-96231b3b80d8
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ops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26195 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26188 91177308-0d34-0410-b5e6-96231b3b80d8
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