| Age | Commit message (Expand) | Author |
|---|
| 2011-07-01 | Rename TargetSubtarget to TargetSubtargetInfo for consistency. | Evan Cheng |
| 2011-06-29 | Sink SubtargetFeature and TargetInstrItineraries (renamed MCInstrItineraries)... | Evan Cheng |
| 2011-06-28 | - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and | Evan Cheng |
| 2011-06-27 | pre-RA-sched: Cleanup register pressure tracking. | Andrew Trick |
| 2011-06-24 | The scheduler needs to be aware on the existence of untyped nodes when it per... | Owen Anderson |
| 2011-06-18 | Don't allocate empty read-only SmallVectors during SelectionDAG deallocation. | Benjamin Kramer |
| 2011-06-15 | Added -stress-sched flag in the Asserts build. | Andrew Trick |
| 2011-04-26 | Be careful about scheduling nodes above previous calls. It increase usages of | Evan Cheng |
| 2011-04-15 | Fix a ton of comment typos found by codespell. Patch by | Chris Lattner |
| 2011-04-14 | In the pre-RA scheduler, maintain cmp+br proximity. | Andrew Trick |
| 2011-04-13 | Recommit r129383. PreRA scheduler heuristic fixes: VRegCycle, TokenFactor lat... | Andrew Trick |
| 2011-04-12 | Revert 129383. It causes some targets to hit a scheduler assert. | Andrew Trick |
| 2011-04-12 | PreRA scheduler heuristic fixes: VRegCycle, TokenFactor latency. | Andrew Trick |
| 2011-04-07 | Added a check in the preRA scheduler for potential interference on a | Andrew Trick |
| 2011-03-09 | Improve pre-RA-sched register pressure tracking for duplicate operands. | Andrew Trick |
| 2011-03-08 | Fix some latent bugs if the nodes are unschedulable. We'd gotten away | Eric Christopher |
| 2011-03-05 | Fix for -sched-high-latency-cycles in sched=list-ilp mode. | Andrew Trick |
| 2011-03-05 | Increased the register pressure limit on x86_64 from 8 to 12 | Andrew Trick |
| 2011-02-04 | Introducing a new method of tracking register pressure. We can't | Andrew Trick |
| 2011-02-03 | whitespace | Andrew Trick |
| 2011-01-27 | Reapply 124301 | Devang Patel |
| 2011-01-26 | Revert 124301. | Devang Patel |
| 2011-01-26 | Process valid SDDbgValues even if the node does not have any order assigned. | Devang Patel |
| 2011-01-26 | Refactor. | Devang Patel |
| 2011-01-25 | This assertion is too restrictive, it does not apply for dangling dbg value n... | Devang Patel |
| 2010-12-23 | flags -> glue for selectiondag | Chris Lattner |
| 2010-12-21 | rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for | Chris Lattner |
| 2010-11-03 | Two sets of changes. Sorry they are intermingled. | Evan Cheng |
| 2010-10-29 | Avoiding overly aggressive latency scheduling. If the two nodes share an | Evan Cheng |
| 2010-10-28 | Re-commit 117518 and 117519 now that ARM MC test failures are out of the way. | Evan Cheng |
| 2010-10-28 | Revert 117518 and 117519 for now. They changed scheduling and cause MC tests ... | Evan Cheng |
| 2010-10-28 | Fix a major bug in operand latency computation. The use index must be adjusted | Evan Cheng |
| 2010-10-06 | - Add TargetInstrInfo::getOperandLatency() to compute operand latencies. This | Evan Cheng |
| 2010-09-29 | Model Cortex-a9 load to SUB, RSB, ADD, ADC, SBC, RSC, CMN, MVN, or CMP | Evan Cheng |
| 2010-09-10 | Teach if-converter to be more careful with predicating instructions that would | Evan Cheng |
| 2010-08-10 | Add missing null check reported by Amaury Pouly. | Evan Cheng |
| 2010-07-10 | Fix a bug in the code which re-inserts DBG_VALUE nodes after scheduling; | Dan Gohman |
| 2010-07-10 | Reapply bottom-up fast-isel, with several fixes for x86-32: | Dan Gohman |
| 2010-07-09 | --- Reverse-merging r107947 into '.': | Bob Wilson |
| 2010-07-09 | Re-apply bottom-up fast-isel, with fixes. Be very careful to avoid emitting | Dan Gohman |
| 2010-06-30 | grammar tweak in comment. | Jim Grosbach |
| 2010-06-29 | Add a VT argument to getMinimalPhysRegClass and replace the copy related uses | Rafael Espindola |
| 2010-06-25 | Remove variables which are assigned to but for which the value | Duncan Sands |
| 2010-06-24 | It's possible that a flag is added to the SDNode that points back to the | Bill Wendling |
| 2010-06-23 | MorphNodeTo doesn't preserve the memory operands. Because we're morphing a node | Bill Wendling |
| 2010-06-21 | Use A.append(...) instead of A.insert(A.end(), ...) when A is a | Dan Gohman |
| 2010-06-10 | Code refactoring, no functionality changes. | Evan Cheng |
| 2010-05-28 | Fix some latency computation bugs: if the use is not a machine opcode do not ... | Evan Cheng |
| 2010-05-20 | Allow targets more controls on what nodes are scheduled by reg pressure, what... | Evan Cheng |
| 2010-05-20 | Add a hybrid bottom up scheduler that reduce register usage while avoiding | Evan Cheng |
