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path: root/lib/CodeGen/RegAllocFast.cpp
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2013-02-21Make RAFast::UsedInInstr indexed by register units.Jakob Stoklund Olesen
This fixes some problems with too conservative checking where we were marking all aliases of a register as used, and then also checking all aliases when allocating a register. <rdar://problem/13249625> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175782 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05Remove special-casing of return blocks for liveness.Jakob Stoklund Olesen
Now that return value registers are return instruction uses, there is no need for special treatment of return blocks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174416 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-02Move all of the header files which are involved in modelling the LLVM IRChandler Carruth
into their new header subdirectory: include/llvm/IR. This matches the directory structure of lib, and begins to correct a long standing point of file layout clutter in LLVM. There are still more header files to move here, but I wanted to handle them in separate commits to make tracking what files make sense at each layer easier. The only really questionable files here are the target intrinsic tablegen files. But that's a battle I'd rather not fight today. I've updated both CMake and Makefile build systems (I think, and my tests think, but I may have missed something). I've also re-sorted the includes throughout the project. I'll be committing updates to Clang, DragonEgg, and Polly momentarily. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171366 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20Use MachineInstrBuilder in a few CodeGen passes.Jakob Stoklund Olesen
This automatically passes a context pointer to MI->addOperand(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170711 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03Use the new script to sort the includes of every file under lib.Chandler Carruth
Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29Use MCPhysReg for RegisterClassInfo allocation orders.Jakob Stoklund Olesen
This saves a bit of memory. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168852 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-28Revert r168630, r168631, and r168633 as these are causing nightly test failures.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168751 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-26Now that the X86 Maximal Stack Alignment Check pass has been removed (i.e.,Chad Rosier
r168627), we no longer need to call the freezeReservedRegs() function a second time. Previously, this pass was conservatively adding the FP to the set of reserved registers, requiring the second update to the reserved registers. rdar://12719844 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168631 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-06[regallocfast] Make sure the MachineRegisterInfo is aware of clobbers from aChad Rosier
register masks. This is an obvious and necessary fix for a soon to be committed patch. No test case possible at this time. Reviewed by Jakob. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167498 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-31Change signature of function RAFast::spillAll to avoid conversion betweenAkira Hatanaka
type MachineInstr* and MachineBasicBlock::iterator. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167088 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-17Use a SparseSet instead of a BitVector for UsedInInstr in RAFast.Jakob Stoklund Olesen
This is just as fast, and it makes it possible to avoid leaking the UsedPhysRegs BitVector implementation through MachineRegisterInfo::addPhysRegsUsed(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166083 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-15Remove RegisterClassInfo::isReserved() and isAllocatable().Jakob Stoklund Olesen
Clients can use the equivalent functions in MRI. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165990 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-22Tidy up a few more uses of MF.getFunction()->getName().David Blaikie
Based on CR feedback from r162301 and Craig Topper's refactoring in r162347 here are a few other places that could use the same API (& in one instance drop a Function.h dependency). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162367 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-08Don't use getNextOperandForReg() in RAFast.Jakob Stoklund Olesen
That particular optimization was probably premature anyway. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161541 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-06Move RegisterClassInfo.h.Andrew Trick
Allow targets to access this API. It's required for RegisterPressure. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158102 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01Switch all register list clients to the new MC*Iterator interface.Jakob Stoklund Olesen
No functional change intended. Sorry for the churn. The iterator classes are supposed to help avoid giant commits like this one in the future. The TableGen-produced register lists are getting quite large, and it may be necessary to change the table representation. This makes it possible to do so without changing all clients (again). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157854 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01Simplify some more getAliasSet callers.Jakob Stoklund Olesen
MCRegAliasIterator can include Reg itself in the list. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157848 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-14Don't access MO reference after invalidating operand list.Jakob Stoklund Olesen
This should unbreak llvm-x86_64-linux. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156778 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-14Fix PR12821.Jakob Stoklund Olesen
RAFast must add an <imp-def> operand when it is rewriting a sub-register def that isn't a read-modify-write. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156777 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-20SparseSet: Add support for key-derived indexes and arbitrary key types.Andrew Trick
This nicely handles the most common case of virtual register sets, but also handles anticipated cases where we will map pointers to IDs. The goal is not to develop a completely generic SparseSet template. Instead we want to handle the expected uses within llvm without any template antics in the client code. I'm adding a bit of template nastiness here, and some assumption about expected usage in order to make the client code very clean. The expected common uses cases I'm designing for: - integer keys that need to be reindexed, and may map to additional data - densely numbered objects where we want pointer keys because no number->object map exists. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155227 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-08Use uint16_t to store instruction implicit uses and defs. Reduces static data.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152301 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-04Use uint16_t to store register overlaps to reduce static data.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152001 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-2280 col.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151167 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-22Use SparseSet for the RAFast live virtual register map.Jakob Stoklund Olesen
This makes RAFast 4% faster, and it gets rid of the dodgy DenseMap iteration. This also revealed that RAFast would sometimes dereference DenseMap iterators after erasing other elements from the map. That does seem to work in the current DenseMap implementation, but SparseSet doesn't allow it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151111 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-21Clear virtual registers after they are no longer referenced.Andrew Trick
Passes after RegAlloc should be able to rely on MRI->getNumVirtRegs() == 0. This makes sharing code for pre/postRA passes more robust. Now, to check if a pass is running before the RA pipeline begins, use MRI->isSSA(). To check if a pass is running after the RA pipeline ends, use !MRI->getNumVirtRegs(). PEI resets virtual regs when it's done scavenging. PTX will either have to provide its own PEI pass or assign physregs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151032 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-17Transfer regmasks to MRI.Jakob Stoklund Olesen
MRI keeps track of which physregs have been used. Make sure it gets updated with all the regmask-clobbered registers. Delete the closePhysRegsUsed() function which isn't necessary. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150830 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10RegAlloc superpass: includes phi elimination, coalescing, and scheduling.Andrew Trick
Creates a configurable regalloc pipeline. Ensure specific llc options do what they say and nothing more: -reglloc=... has no effect other than selecting the allocator pass itself. This patch introduces a new umbrella flag, "-optimize-regalloc", to enable/disable the optimizing regalloc "superpass". This allows for example testing coalscing and scheduling under -O0 or vice-versa. When a CodeGen pass requires the MachineFunction to have a particular property, we need to explicitly define that property so it can be directly queried rather than naming a specific Pass. For example, to check for SSA, use MRI->isSSA, not addRequired<PHIElimination>. CodeGen transformation passes are never "required" as an analysis ProcessImplicitDefs does not require LiveVariables. We have a plan to massively simplify some of the early passes within the regalloc superpass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150226 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-31Obvious unnecessary loop removal. Follow through from previous checkin.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149398 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-31RAFast: Generalize the logic for return operands.Andrew Trick
This removes implicit assumption about the form of MI coming into regalloc. In particular, it should be independent of ProcessImplicitDefs which will eventually become a standard part of coming out of SSA--unless we simply can eliminate IMPLICIT_DEF completely. Current unit tests expose this once I remove incidental pass ordering restrictions. This is not a final fix. Just a temporary workaround until I figure out the right way. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149360 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-05Freeze reserved registers before starting register allocation.Jakob Stoklund Olesen
The register allocators don't currently support adding reserved registers while they are running. Extend the MRI API to keep track of the set of reserved registers when register allocation started. Target hooks like hasFP() and needsStackRealignment() can look at this set to avoid reserving more registers during register allocation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147577 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07Add bundle aware API for querying instruction properties and switch the codeEvan Cheng
generator to it. For non-bundle instructions, these behave exactly the same as the MC layer API. For properties like mayLoad / mayStore, look into the bundle and if any of the bundled instructions has the property it would return true. For properties like isPredicable, only return true if *all* of the bundled instructions have the property. For properties like canFoldAsLoad, isCompare, conservatively return false for bundles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146026 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-22If a register is both an early clobber and part of a tied use, handle the useRafael Espindola
before the clobber so that we copy the value if needed. Fixes pr11415. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145056 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15Insert modified DBG_VALUE into LiveDbgValueMap. Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144696 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02Better diagnostics when inline asm fails to allocate.Jakob Stoklund Olesen
asm.c:2:7: error: ran out of registers during register allocation asm(""::"r"(0), "r"(1), "r"(2), "r"(3), "r"(4), "r"(5), "r"(6), "r"(7), "r"(8), "r"(9)); ^ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134310 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28- Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo andEvan Cheng
sink them into MC layer. - Added MCInstrInfo, which captures the tablegen generated static data. Chang TargetInstrInfo so it's based off MCInstrInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134021 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28Print registers by name instead of by number.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134013 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-21After register is spilled there should not be any DBG_VALUE referring the ↵Devang Patel
same register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133569 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-21There could be more than one DBG_VALUE instructions for variables where all ↵Devang Patel
of them have offset based on one register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133560 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-13Be less aggressive about hinting in RAFast.Jakob Stoklund Olesen
In particular, don't spill dirty registers only to satisfy a hint. It is not worth it. The attached test case provides an example where the fast allocator would spill a register when other registers are available. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132900 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02Avoid calling TRI->getAllocatableSet in RAFast.Jakob Stoklund Olesen
When compiling a program with lots of small functions like 483.xalancbmk, this makes RAFast 11% faster. Add some comments to clarify the difference between unallocatable and reserved registers. It's quite subtle. The fast register allocator depends on EFLAGS' not being allocatable on x86. That way it can completely avoid tracking liveness, and it won't mind when there are multiple uses of a single def. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132514 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02Use RegisterClassInfo::getOrder in RAFast.Jakob Stoklund Olesen
This saves two virtual function calls and an Allocatable BitVector test, making RAFast run 2% faster. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132471 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-22TypoEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129970 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-18Fix a bug where we were counting the alias sets as completely usedEric Christopher
registers for fast allocation a different way. This has us updating used registers only when we're using that exact register. Fixes rdar://9207598 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129711 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13Temporarily revert r129408 to see if it brings the bots back.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129417 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-12Fix a bug where we were counting the alias sets as completely usedEric Christopher
registers for fast allocation. Fixes rdar://9207598 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129408 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-12Add more comments... err debug statements to the fast allocator.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129400 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-12Fix typo.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129334 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-04Mark that the return is using EAX so that we don't use it for some otherNick Lewycky
purpose. Fixes PR9080! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124903 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.Jakob Stoklund Olesen
These functions not longer assert when passed 0, but simply return false instead. No functional change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123155 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09Remove MachineRegisterInfo::getLastVirtReg(), it was giving wrong resultsJakob Stoklund Olesen
when no virtual registers have been allocated. It was only used to resize IndexedMaps, so provide an IndexedMap::resize() method such that Map.grow(MRI.getLastVirtReg()); can be replaced with the simpler Map.resize(MRI.getNumVirtRegs()); This works correctly when no virtuals are allocated, and it bypasses the to/from index conversions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123130 91177308-0d34-0410-b5e6-96231b3b80d8
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