emscripten-fastcomp - LLVM with the emscripten fastcomp javascript backend

Age	Commit message (Collapse)	Author
2007-12-31	Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the	Owen Anderson
	Machine-level API cleanup instigated by Chris. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45470 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-31	Rename SSARegMap -> MachineRegisterInfo in keeping with the idea	Chris Lattner
	that "machine" classes are used to represent the current state of the code being compiled. Given this expanded name, we can start moving other stuff into it. For now, move the UsedPhysRegs and LiveIn/LoveOuts vectors from MachineFunction into it. Update all the clients to match. This also reduces some needless #includes, such as MachineModuleInfo from MachineFunction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45467 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-29	Remove attribution from file headers, per discussion on llvmdev.	Chris Lattner
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-23	isSubRegOf() is a dup of isSubRegister.	Evan Cheng
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43249 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-26	Allow copyRegToReg to emit cross register classes copies.	Evan Cheng
	Tested with "make check"! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42346 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-14	Remove isReg, isImm, and isMBB, and change all their users to use	Dan Gohman
	isRegister, isImmediate, and isMachineBasicBlock, which are equivalent, and more popular. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41958 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-10	Move isSubRegOf into MRegisterInfo. Fix a missed move elimination in ↵	Christopher Lamb
	LowerSubregs and add more debugging output there. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41005 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-06	Implement review feedback. No functionality change.	Christopher Lamb
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40863 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-26	Add a MachineFunction pass, which runs post register allocation, that turns ↵	Christopher Lamb
	subreg insert/extract instruction into register copies. This ensures correct code gen if the coalescer isn't able to remove all subreg instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40521 91177308-0d34-0410-b5e6-96231b3b80d8