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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14997 91177308-0d34-0410-b5e6-96231b3b80d8
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* vreg <-> vreg joining now works, enable it unconditionally when joining
is enabled (which is the default).
* Fix a serious pessimization of spill code where we were saying that a
spilled DEF operand was live into the subsequent instruction. This allows
for substantially better code when spilling starts to happen.
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order, causing the inactive list in the linearscan list to get unsorted, which
basically fuxored everything up severely.
These seems to fix the joiner, so with more testing I will enable it by default.
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Heavily refactor handleVirtualRegisterDef, adding comments and making it more
efficient. It is also much easier to follow and convince ones self that it is
correct :)
Add -debug output to the joine, showing the result of joining the intervals.
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but make virtreg->virtreg joining stay off by default
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classes: just ignore that move. Thanks to Vladimir Prus who found the
bug!
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don't exist, we don't have to pretend to handle them.
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use them instead of a local LiveVariables numbering
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map.
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block.
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MachineBasicBlock that is not yet attached to a MachineFunction. This change includes changing the third operand (TargetMachine) to a pointer for the MachineInstr::print function.
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existing llvm::Interval class.
Patch contributed by Vladimir Prus!
http://mail.cs.uiuc.edu/pipermail/llvmbugs/2004-June/000710.html
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spills. This allows for more flexibility when allocating registers for
spill code.
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workaround, use the C HUGE_VAL macro instead.
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instruction to make the API more flexible.
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MRegisterInfo::is{Physical,Virtual}Register. Apply appropriate fixes
to relevant files.
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parts of the compiler
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Also make it less aggressive as the current implementation breaks in
some cases.
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1. LiveIntervals now implement a 4 slot per instruction model. Load,
Use, Def and a Store slot. This is required in order to correctly
represent caller saved register clobbering on function calls,
register reuse in the same instruction (def resues last use) and
also spill code added later by the allocator. The previous
representation (2 slots per instruction) was insufficient and as a
result was causing subtle bugs.
2. Fixes in spill code generation. This was the major cause of
failures in the test suite.
3. Linear scan now has core support for folding memory operands. This
is untested and not enabled (the live interval update function does
not attempt to fold loads/stores in instructions).
4. Lots of improvements in the debugging output of both live intervals
and linear scan. Give it a try... it is beautiful :-)
In summary the above fixes all the issues with the recent reserved
register elimination changes and get the allocator very close to the
next big step: folding memory operands.
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std::numeric_limits<float>::max() for weighting preallocated
intervals.
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ilist of MachineInstr objects. This allows constant time removal and
insertion of MachineInstr instances from anywhere in each
MachineBasicBlock. It also allows for constant time splicing of
MachineInstrs into or out of MachineBasicBlocks.
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slots each. As a concequence they get numbered as 0, 2, 4 and so
on. The first slot is used for operand uses and the second for
defs. Here's an example:
0: A = ...
2: B = ...
4: C = A + B ;; last use of A
The live intervals should look like:
A = [1, 5)
B = [3, x)
C = [5, y)
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access. Rather we only have to do it on the creation of the interval.
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outside of loops = 0.
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