diff options
| author | Alkis Evlogimenos <alkis@evlogimenos.com> | 2004-02-26 22:00:20 +0000 |
|---|---|---|
| committer | Alkis Evlogimenos <alkis@evlogimenos.com> | 2004-02-26 22:00:20 +0000 |
| commit | 71e353ed3530a5da48c3dd3257c410f6c4ce2e3e (patch) | |
| tree | 6dd111fd83e0cf39d8b46be6afe448d8bbbb8c84 /lib/CodeGen/LiveIntervalAnalysis.cpp | |
| parent | 0550256c3185f58faef04812a40824f6721a2ddf (diff) | |
Uncomment assertions that register# != 0 on calls to
MRegisterInfo::is{Physical,Virtual}Register. Apply appropriate fixes
to relevant files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11882 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/LiveIntervalAnalysis.cpp')
| -rw-r--r-- | lib/CodeGen/LiveIntervalAnalysis.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp index 024ff12ea5..fc46de2be9 100644 --- a/lib/CodeGen/LiveIntervalAnalysis.cpp +++ b/lib/CodeGen/LiveIntervalAnalysis.cpp @@ -134,7 +134,7 @@ bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) { mii != mie; ) { for (unsigned i = 0; i < mii->getNumOperands(); ++i) { const MachineOperand& mop = mii->getOperand(i); - if (mop.isRegister()) { + if (mop.isRegister() && mop.getReg()) { // replace register with representative register unsigned reg = rep(mop.getReg()); mii->SetMachineOperandReg(i, reg); @@ -421,7 +421,7 @@ void LiveIntervals::computeIntervals() for (int i = mi->getNumOperands() - 1; i >= 0; --i) { MachineOperand& mop = mi->getOperand(i); // handle register defs - build intervals - if (mop.isRegister() && mop.isDef()) + if (mop.isRegister() && mop.getReg() && mop.isDef()) handleRegisterDef(mbb, mi, mop.getReg()); } } |