| Age | Commit message (Expand) | Author |
|---|
| 2010-06-21 | Remove isTwoAddress from llvm. | Eric Christopher |
| 2010-06-18 | Allow ARM if-converter to be run after post allocation scheduling. | Evan Cheng |
| 2010-06-18 | Start TargetRegisterClass indices at 0 instead of 1, so that | Dan Gohman |
| 2010-06-18 | Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass, | Dan Gohman |
| 2010-06-17 | Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This | Stuart Hastings |
| 2010-06-14 | Fix a comment typo. | Bob Wilson |
| 2010-06-12 | declare a class with 'class' instead of struct to avoid tag mismatch | Chris Lattner |
| 2010-06-12 | Allow target to provide its own hazard recognizer to post-ra scheduler. | Evan Cheng |
| 2010-06-09 | Allow target to place 2-address pass inserted copies in better spots. Thumb2 ... | Evan Cheng |
| 2010-06-09 | - Fix description of SUBREG_TO_REG. It's not going to generate a zext. But it | Bill Wendling |
| 2010-06-08 | Reapply r105521, this time appending "LLU" to 64 bit | Bruno Cardoso Lopes |
| 2010-06-05 | revert r105521, which is breaking the buildbots with stuff like this: | Chris Lattner |
| 2010-06-05 | Initial AVX support for some instructions. No patterns matched | Bruno Cardoso Lopes |
| 2010-06-02 | Slightly change the meaning of the reMaterialize target hook when the original | Jakob Stoklund Olesen |
| 2010-06-02 | Rename canCombinedSubRegIndex method to something more grammatically correct | Bob Wilson |
| 2010-06-02 | Remove uses of getCalleeSavedRegClasses from outside the | Rafael Espindola |
| 2010-05-28 | Add a TargetRegisterInfo::composeSubRegIndices hook with a default | Jakob Stoklund Olesen |
| 2010-05-26 | MC: Add TargetMachine support for setting the value of MCRelaxAll with | Daniel Dunbar |
| 2010-05-26 | MC: Change RelaxInstruction to only take the input and output instructions. | Daniel Dunbar |
| 2010-05-26 | MC: Simplify MayNeedRelaxation to not provide the fixups, so we can query it | Daniel Dunbar |
| 2010-05-26 | Replace the SubRegSet tablegen class with a less error-prone mechanism. | Jakob Stoklund Olesen |
| 2010-05-26 | MC: Eliminate MCAsmFixup, replace with MCFixup. | Daniel Dunbar |
| 2010-05-26 | Revert "Replace the SubRegSet tablegen class with a less error-prone mechanism." | Jakob Stoklund Olesen |
| 2010-05-26 | Replace the SubRegSet tablegen class with a less error-prone mechanism. | Jakob Stoklund Olesen |
| 2010-05-25 | Drop the SuperregHashTable. It is essentially the same as SubregHashTable. | Jakob Stoklund Olesen |
| 2010-05-25 | Print symbolic SubRegIndex names on machine operands. | Jakob Stoklund Olesen |
| 2010-05-25 | Remove NumberHack entirely. | Jakob Stoklund Olesen |
| 2010-05-24 | Switch SubRegSet to using symbolic SubRegIndices | Jakob Stoklund Olesen |
| 2010-05-24 | Replace the tablegen RegisterClass field SubRegClassList with an alist-like data | Jakob Stoklund Olesen |
| 2010-05-24 | Add the SubRegIndex TableGen class. | Jakob Stoklund Olesen |
| 2010-05-22 | tblgen/AsmMatcher: Change AsmOperandClass to allow a list of superclasses ins... | Daniel Dunbar |
| 2010-05-22 | Implement @llvm.returnaddress. rdar://8015977. | Evan Cheng |
| 2010-05-22 | Add a new section and accessor for TLS data. | Eric Christopher |
| 2010-05-21 | Currently, createMachOStreamer() is invoked directly in llvm-mc which | Matt Fleming |
| 2010-05-20 | Allow targets more controls on what nodes are scheduled by reg pressure, what... | Evan Cheng |
| 2010-05-20 | tblgen/Target: Add a isAsmParserOnly bit, and teach the disassembler to honor | Daniel Dunbar |
| 2010-05-20 | Add a hybrid bottom up scheduler that reduce register usage while avoiding | Evan Cheng |
| 2010-05-19 | Code refactoring: pull SchedPreference enum from TargetLowering.h to TargetMa... | Evan Cheng |
| 2010-05-15 | Allow TargetLowering::getRegClassFor() to be called on illegal types. Also | Evan Cheng |
| 2010-05-14 | Teach two-address pass to do some coalescing while eliminating REG_SEQUENCE | Evan Cheng |
| 2010-05-14 | Get rid of the bit twiddling to read / set OpActions and ValueTypeActions. Th... | Evan Cheng |
| 2010-05-13 | Eliminate use of magic numbers to access OpActions. It also has the effect of... | Evan Cheng |
| 2010-05-13 | Fix up LoadExtActions, TruncStoreActions, and IndexedModeActions representati... | Evan Cheng |
| 2010-05-13 | 80 col violation. | Evan Cheng |
| 2010-05-12 | MC/Mach-O/x86_64: Add a new hook for checking whether a particular section can | Daniel Dunbar |
| 2010-05-11 | Remove the "WantsWholeFile" concept, as it's no longer needed. CBE | Dan Gohman |
| 2010-05-11 | Trim #includes and forward declarations. | Dan Gohman |
| 2010-05-11 | Fix a comment. | Dan Gohman |
| 2010-05-11 | Implement a bunch more TargetSelectionDAGInfo infrastructure. | Dan Gohman |
| 2010-05-11 | Remove the TargetLowering::getSubtarget() virtual function, which | Dan Gohman |
