| Age | Commit message (Expand) | Author |
|---|
| 2009-11-18 | The llvm-gcc front-end and the pass manager use two separate TargetData objects. | Bill Wendling |
| 2009-11-14 | Added getSubRegIndex(A,B) that returns subreg index of A to B. Use it to repl... | Evan Cheng |
| 2009-11-14 | - Change TargetInstrInfo::reMaterialize to pass in TargetRegisterInfo. | Evan Cheng |
| 2009-11-13 | Allow target to specify regclass for which antideps will only be broken along... | David Goodwin |
| 2009-11-13 | Fix a bootstrap failure. | David Greene |
| 2009-11-12 | Make the MachineFunction argument of getFrameRegister const. | David Greene |
| 2009-11-12 | Add hasLoadFromStackSlot and hasStoreToStackSlot to return whether a | David Greene |
| 2009-11-12 | Mark DBG_LABEL, EH_LABEL, and GC_LABEL as not-duplicable, since | Dan Gohman |
| 2009-11-12 | isLegalICmpImmediate should take a signed integer; code clean up. | Evan Cheng |
| 2009-11-11 | Add TargetLowering::isLegalICmpImmediate. It tells LSR what immediate can be ... | Evan Cheng |
| 2009-11-10 | Fixed to address code review. No functional changes. | David Goodwin |
| 2009-11-10 | Allow targets to specify register classes whose member registers should not b... | David Goodwin |
| 2009-11-09 | fix some bogus asserts, PR5049 | Chris Lattner |
| 2009-11-07 | all targets should be required to declare legal integer types. My plan to | Chris Lattner |
| 2009-11-07 | add the ability for TargetData to return information about legal integer | Chris Lattner |
| 2009-11-07 | more cleanup. | Chris Lattner |
| 2009-11-07 | rewrite TargetData to use StringRef/raw_ostream instead of thrashing std::str... | Chris Lattner |
| 2009-11-07 | Missed this. | Evan Cheng |
| 2009-11-07 | Add code to check at SelectionDAGISel::LowerArguments time to see if return v... | Kenneth Uildriks |
| 2009-11-06 | Pass StringRef by value. | Daniel Dunbar |
| 2009-11-05 | Reintroduce support for overloading target intrinsics | Mon P Wang |
| 2009-11-03 | Add a couple more target nodes | Nate Begeman |
| 2009-10-30 | Fix MachineLICM to use the correct virtual register class when | Dan Gohman |
| 2009-10-30 | Initial target-independent CodeGen support for BlockAddresses. | Dan Gohman |
| 2009-10-29 | Rename usesCustomDAGSchedInserter to usesCustomInserter, and update a | Dan Gohman |
| 2009-10-28 | Add a second ValueType argument to isFPImmLegal. | Evan Cheng |
| 2009-10-27 | Do away with addLegalFPImmediate. Add a target hook isFPImmLegal which return... | Evan Cheng |
| 2009-10-26 | - Revert some changes from 85044, 85045, and 85047 that broke x86_64 tests and | Evan Cheng |
| 2009-10-26 | Move DataTypes.h to include/llvm/System, update all users. This breaks the last | Chandler Carruth |
| 2009-10-25 | Add isIdentityCopy to check for identity copy (or extract_subreg, etc.) | Evan Cheng |
| 2009-10-23 | Identity copies should not contribute to spill weight. | Evan Cheng |
| 2009-10-22 | Allow the target to select the level of anti-dependence breaking that should ... | David Goodwin |
| 2009-10-20 | Wire up the ARM MCInst printer, for llvm-mc. | Daniel Dunbar |
| 2009-10-19 | Adjust the scavenge register spilling to allow the target to choose an | Jim Grosbach |
| 2009-10-16 | Change createPostRAScheduler so it can be turned off at llc -O1. | Evan Cheng |
| 2009-10-16 | Add a CodeGenOpt::Less level to match -O1. It'll be used by clients which do ... | Evan Cheng |
| 2009-10-15 | Clean up TargetIntrinsicInfo API. Add pure virtual methods. | Jakob Stoklund Olesen |
| 2009-10-12 | Revert the kludge in 76703. I got a clean | Dale Johannesen |
| 2009-10-10 | Replace X86's CanRematLoadWithDispOperand by calling the target-independent | Dan Gohman |
| 2009-10-09 | Factor out LiveIntervalAnalysis' code to determine whether an instruction | Dan Gohman |
| 2009-10-09 | Add a const qualifier. | Dan Gohman |
| 2009-10-08 | Re-enable register scavenging in Thumb1 by default. | Jim Grosbach |
| 2009-10-07 | reverting thumb1 scavenging default due to test failure while I figure out wh... | Jim Grosbach |
| 2009-10-07 | Enable thumb1 register scavenging by default. | Jim Grosbach |
| 2009-10-07 | Replace TargetInstrInfo::isInvariantLoad and its target-specific | Dan Gohman |
| 2009-10-07 | Add register-reuse to frame-index register scavenging. When a target uses | Jim Grosbach |
| 2009-10-05 | In Thumb1, the register scavenger is not always able to use an emergency | Jim Grosbach |
| 2009-10-01 | remove trailing whitespace | Jim Grosbach |
| 2009-10-01 | Add instruction flags: hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq. When | Evan Cheng |
| 2009-09-30 | Use OutStreamer.SwitchSection instead of writing out textual section directives. | Bob Wilson |
