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register coalescer interface: RegisterCoalescing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43714 91177308-0d34-0410-b5e6-96231b3b80d8
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- Some code clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43606 91177308-0d34-0410-b5e6-96231b3b80d8
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traversing inverse register coalescing map.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43118 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43026 91177308-0d34-0410-b5e6-96231b3b80d8
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(almost) a register copy. However, it always coalesced to the register of the
RHS (the super-register). All uses of the result of a EXTRACT_SUBREG are sub-
register uses which adds subtle complications to load folding, spiller rewrite,
etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42899 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41743 91177308-0d34-0410-b5e6-96231b3b80d8
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1. Eliminate the costly live interval "swapping".
2. Change ValueNumberInfo container from SmallVector to std::vector. The former
performs slowly when the vector size is very large.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41536 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41482 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38454 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38453 91177308-0d34-0410-b5e6-96231b3b80d8
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simultaneously. Move that pass to SimpleRegisterCoalescing.
This makes it easier to implement alternative register allocation and
coalescing strategies while maintaining reuse of the existing live
interval analysis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37520 91177308-0d34-0410-b5e6-96231b3b80d8
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