emscripten-fastcomp - LLVM with the emscripten fastcomp javascript backend

Age	Commit message (Expand)	Author
2012-08-23	Simplify the computeOperandLatency API.	Andrew Trick
2012-06-13	sched: Avoid trivially redundant DAG edges. Take the one with higher latency.	Andrew Trick
2012-06-05	misched: API for minimum vs. expected latency.	Andrew Trick
2012-03-14	misched: implemented a framework for top-down or bottom-up scheduling.	Andrew Trick
2012-03-07	misched preparation: rename core scheduler methods for consistency.	Andrew Trick
2012-03-07	misched preparation: clarify ScheduleDAG and ScheduleDAGInstrs roles.	Andrew Trick
2012-03-07	misched preparation: modularize schedule emission.	Andrew Trick
2012-03-07	misched preparation: modularize schedule printing.	Andrew Trick
2012-03-07	misched preparation: modularize schedule verification.	Andrew Trick
2012-03-07	Cleanup in preparation for misched: Move DAG visualization logic.	Andrew Trick
2012-03-07	Cleanup: DAG building is specific to either SD or MI scheduling. Not part of ...	Andrew Trick
2012-03-07	misched comments	Andrew Trick
2012-02-22	Initialize SUnits before DAG building.	Andrew Trick
2012-02-06	Move some llvm_unreachable's from r149849 out of switch statements to satisfy...	Craig Topper
2012-02-05	Convert assert(0) to llvm_unreachable	Craig Topper
2012-01-12	Move Sched::Preference out of TargetMachine.h where it is not referenced.	Evan Cheng
2011-12-20	Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_...	David Blaikie
2011-06-28	- Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and	Evan Cheng
2011-06-15	Added -stress-sched flag in the Asserts build.	Andrew Trick
2011-06-02	Remove dead code.	Devang Patel
2011-04-26	Be careful about scheduling nodes above previous calls. It increase usages of	Evan Cheng
2011-04-15	Fix a ton of comment typos found by codespell. Patch by	Chris Lattner
2011-04-14	In the pre-RA scheduler, maintain cmp+br proximity.	Andrew Trick
2011-04-07	Added a check in the preRA scheduler for potential interference on a	Andrew Trick
2011-03-07	Typos.	Eric Christopher
2011-02-04	Introducing a new method of tracking register pressure. We can't	Andrew Trick
2010-12-25	Header warning patrol.	Eric Christopher
2010-12-24	Minor cleanup related to my latest scheduler changes.	Andrew Trick
2010-12-24	Various bits of framework needed for precise machine-level selection	Andrew Trick
2010-12-24	whitespace	Andrew Trick
2010-12-20	update comment.	Chris Lattner
2010-11-25	SDep is POD-like. Shave off a few bytes from SUnit by moving a member around.	Benjamin Kramer
2010-11-03	Two sets of changes. Sorry they are intermingled.	Evan Cheng
2010-05-26	Change push_all to a non-virtual function and implement it in the	Dan Gohman
2010-05-26	Delete an unused function.	Dan Gohman
2010-05-20	Allow targets more controls on what nodes are scheduled by reg pressure, what...	Evan Cheng
2010-05-20	Add a hybrid bottom up scheduler that reduce register usage while avoiding	Evan Cheng
2010-05-19	Fix the post-RA instruction scheduler to handle instructions referenced by	Jim Grosbach
2010-05-17	Remove unused member variable.	Zhongxing Xu
2010-05-01	Get rid of the EdgeMapping map. Instead, just check for BasicBlock	Dan Gohman
2010-04-13	Delete an unused member variable.	Dan Gohman
2010-04-05	trim some prototypes.	Chris Lattner
2010-03-10	Progress towards shepherding debug info through SelectionDAG.	Dale Johannesen
2009-11-20	Remove some old experimental code that is no longer needed. Remove additional...	David Goodwin
2009-11-03	Do a scheduling pass ignoring anti-dependencies to identify candidate registe...	David Goodwin
2009-10-14	Delete bogus semicolons.	Dan Gohman
2009-10-14	Remove a bunch of unused arguments from functions, silencing a	Eric Christopher
2009-10-12	Delete some obsolete declarations.	Dan Gohman
2009-10-09	The ScheduleDAG framework now requires an AliasAnalysis argument, though	Dan Gohman
2009-09-30	Fix integer overflow in instruction scheduling. This can happen if we have	Reid Kleckner