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path: root/include/llvm/CodeGen/MachineRegisterInfo.h
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2013-04-19Add an MRI::verifyUseLists() function.Jakob Stoklund Olesen
This checks the sanity of the register use lists in the MI intermediate representation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179895 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-11Residual cleanup: live-out set is goneEli Bendersky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176836 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21Make RAFast::UsedInInstr indexed by register units.Jakob Stoklund Olesen
This fixes some problems with too conservative checking where we were marking all aliases of a register as used, and then also checking all aliases when allocating a register. <rdar://problem/13249625> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175782 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05Remove liveout lists from MachineRegisterInfo.Jakob Stoklund Olesen
All targets are now adding return value registers as implicit uses on return instructions, and there is no longer a need for the live out lists. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174417 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-05Add MachineRegisterInfo::moveOperands().Jakob Stoklund Olesen
This function works like memmove() for MachineOperands, except it also updates any use-def chains containing the moved operands. The use-def chains are updated without affecting the order of operands in the list. That isn't possible when using the removeRegOperandFromUseList() and addRegOperandToUseList() functions. Callers to follow soon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171597 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03Sort the #include lines for the include/... tree with the script.Chandler Carruth
AKA: Recompile *ALL* the source code! This one went much better. No manual edits here. I spot-checked for silliness and grep-checked for really broken edits and everything seemed good. It all still compiles. Yell if you see something that looks goofy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169133 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-17Switch MRI::UsedPhysRegs to a register unit bit vector.Jakob Stoklund Olesen
This is a more compact, less redundant representation, and it avoids scanning long lists of aliases for ARM D-registers, for example. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166124 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-17Merge MRI::isPhysRegOrOverlapUsed() into isPhysRegUsed().Jakob Stoklund Olesen
All callers of these functions really want the isPhysRegOrOverlapUsed() functionality which also checks aliases. For historical reasons, targets without register aliases were calling isPhysRegUsed() instead. Change isPhysRegUsed() to also check aliases, and switch all isPhysRegOrOverlapUsed() callers to isPhysRegUsed(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166117 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-17Use a SparseSet instead of a BitVector for UsedInInstr in RAFast.Jakob Stoklund Olesen
This is just as fast, and it makes it possible to avoid leaking the UsedPhysRegs BitVector implementation through MachineRegisterInfo::addPhysRegsUsed(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166083 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-15Freeze the reserved registers as soon as isel is complete.Jakob Stoklund Olesen
Also provide an MRI::getReservedRegs() function to access the frozen register set, and isReserved() and isAllocatable() methods to test individual registers. The various implementations of TRI::getReservedRegs() are quite complicated, and many passes need to look at the reserved register set. This patch makes it possible for these passes to use the cached copy in MRI, avoiding a lot of malloc traffic and repeated calculations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165982 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-17Mark unimplemented copy constructors and copy assignment operators as ↵Craig Topper
LLVM_DELETED_FUNCTION. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164016 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-10Reapply r161633-161634 "Partition use lists so defs always come before uses.""Jakob Stoklund Olesen
No changes to these patches, MRI needed to be notified when changing uses into defs and vice versa. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161644 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-09Revert r161633-161634 "Partition use lists so defs always come before uses."Jakob Stoklund Olesen
These commits broke a number of buildbots. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161640 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-09Partition use lists so defs always come before uses.Jakob Stoklund Olesen
This makes it possible to speed up def_iterator by stopping at the first use. This makes def_empty() and getUniqueVRegDef() much faster when there are many uses. In a +Asserts build, LiveVariables is 100x faster in one case because getVRegDef() has an assertion that would scan to the end of a def_iterator chain. Spill weight calculation is significantly faster (300x in one case) because isTriviallyReMaterializable() calls MRI->isConstantPhysReg(%RIP) which calls def_empty(%RIP). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161634 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-09Don't use pointer-pointers for the register use lists.Jakob Stoklund Olesen
Use a more conventional doubly linked list where the Prev pointers form a cycle. This means it is no longer necessary to adjust the Prev pointers when reallocating the VRegInfo array. The test changes are required because the register allocation hint is using the use-list order to break ties. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161633 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-09Move use list management into MachineRegisterInfo.Jakob Stoklund Olesen
Register MachineOperands are kept in linked lists accessible via MRI's reg_iterator interfaces. The linked list management was handled partly by MachineOperand methods, partly by MRI methods. Move all of the list management into MRI, delete MO::AddRegOperandToRegInfo() and MO::RemoveRegOperandFromRegInfo(). Be more explicit about handling the cases where an MRI pointer isn't available. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161632 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-08Move getNextOperandForReg() into MachineRegisterInfo.Jakob Stoklund Olesen
MRI provides iterators for traversing the use-def chains. They should not be accessible from anywhere else. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161543 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-30Added MachineRegisterInfo::hasOneDef()Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161009 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-30Inline MachineRegisterInfo::hasOneUseAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161007 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-29Add getUniqueVRegDef to MachineRegisterInfo.Manman Ren
This comes in handy during peephole optimization. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159453 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01Switch all register list clients to the new MC*Iterator interface.Jakob Stoklund Olesen
No functional change intended. Sorry for the churn. The iterator classes are supposed to help avoid giant commits like this one in the future. The TableGen-produced register lists are getting quite large, and it may be necessary to change the table representation. This makes it possible to do so without changing all clients (again). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157854 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-27Add an MRI::tracksLiveness() flag.Jakob Stoklund Olesen
Late optimization passes like branch folding and tail duplication can transform the machine code in a way that makes it expensive to keep the register liveness information up to date. There is a fuzzy line between register allocation and late scheduling where the liveness information degrades. The MRI::tracksLiveness() flag makes the line clear: While true, liveness information is accurate, and can be used for register scavenging. Once the flag is false, liveness information is not accurate, and can only be used as a hint. Late passes generally don't need the liveness information, but they will sometimes use the register scavenger to help update it. The scavenger enforces strict correctness, and we have to spend a lot of code to update register liveness that may never be used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153511 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-04Use uint16_t to store register overlaps to reduce static data.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152001 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-01Make InlineSpiller bundle-aware.Jakob Stoklund Olesen
Simply treat bundles as instructions. Spill code is inserted between bundles, never inside a bundle. Rewrite all operands in a bundle at once. Don't attempt and memory operand folding inside bundles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151787 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-21Clear virtual registers after they are no longer referenced.Andrew Trick
Passes after RegAlloc should be able to rely on MRI->getNumVirtRegs() == 0. This makes sharing code for pre/postRA passes more robust. Now, to check if a pass is running before the RA pipeline begins, use MRI->isSSA(). To check if a pass is running after the RA pipeline ends, use !MRI->getNumVirtRegs(). PEI resets virtual regs when it's done scavenging. PTX will either have to provide its own PEI pass or assign physregs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151032 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-21whitespaceAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151030 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-17Transfer regmasks to MRI.Jakob Stoklund Olesen
MRI keeps track of which physregs have been used. Make sure it gets updated with all the regmask-clobbered registers. Delete the closePhysRegsUsed() function which isn't necessary. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150830 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16Extract method for detecting constant unallocatable physregs.Jakob Stoklund Olesen
It is safe to move uses of such registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148259 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-05Freeze reserved registers before starting register allocation.Jakob Stoklund Olesen
The register allocators don't currently support adding reserved registers while they are running. Extend the MRI API to keep track of the set of reserved registers when register allocation started. Target hooks like hasFP() and needsStackRealignment() can look at this set to avoid reserving more registers during register allocation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147577 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-21Move common code into an MRI function.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147071 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-17Admonish that MI is not IR and virtual registers have constraints.Jakob Stoklund Olesen
In machine code, you can't just replaceRegWith() the same way you can replaceAllUsesWith() in IR. Virtual registers may have different register classes that need to be merged first. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142201 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-30Move getCommonSubClass() into TRI.Jakob Stoklund Olesen
It will soon need the context. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140896 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22Add a MinNumRegs argument to MRI::constrainRegClass().Jakob Stoklund Olesen
The function will refuse to use a register class with fewer registers than MinNumRegs. This can be used by clients to avoid accidentally increase register pressure too much. The default value of MinNumRegs=0 doesn't affect how constrainRegClass() works. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140339 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09Move CalculateRegClass to MRI::recomputeRegClass.Jakob Stoklund Olesen
This function doesn't have anything to do with spill weights, and MRI already has functions for manipulating the register class of a virtual register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137123 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29Add an isSSA() flag to MachineRegisterInfo.Jakob Stoklund Olesen
This flag is true from isel to register allocation when the machine function is required to be in SSA form. The TwoAddressInstructionPass and PHIElimination passes clear the flag. The SSA flag wil be used by the machine code verifier to check for SSA form, and eventually an assertion can enforce it in +Asserts builds. This will catch the common target error of creating machine code with multiple defs of a virtual register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136532 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-08Be more aggressive about following hints.Jakob Stoklund Olesen
RAGreedy::tryAssign will now evict interference from the preferred register even when another register is free. To support this, add the EvictionCost struct that counts how many hints are broken by an eviction. We don't want to break one hint just to satisfy another. Rename canEvict to shouldEvict, and add the first bit of eviction policy that doesn't depend on spill weights: Always make room in the preferred register as long as the evictees can be split and aren't already assigned to their preferred register. Also make the CSR avoidance more accurate. When looking for a cheaper register it is OK to use a new volatile register. Only CSR aliases that have never been used before should be avoided. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134735 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-27Remove RegClass2VRegMap from MachineRegisterInfo.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133967 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-21Revert r124611 - "Keep track of incoming argument's location while emitting ↵Devang Patel
LiveIns." In other words, do not keep track of argument's location. The debugger (gdb) is not prepared to see line table entries for arguments. For the debugger, "second" line table entry marks beginning of function body. This requires some coordination with debugger to get this working. - The debugger needs to be aware of prolog_end attribute attached with line table entries. - The compiler needs to accurately mark prolog_end in line table entries (at -O0 and at -O1+) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126155 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-31Keep track of incoming argument's location while emitting LiveIns.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124611 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.Jakob Stoklund Olesen
These functions not longer assert when passed 0, but simply return false instead. No functional change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123155 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09Remove MachineRegisterInfo::getLastVirtReg(), it was giving wrong resultsJakob Stoklund Olesen
when no virtual registers have been allocated. It was only used to resize IndexedMaps, so provide an IndexedMap::resize() method such that Map.grow(MRI.getLastVirtReg()); can be replaced with the simpler Map.resize(MRI.getNumVirtRegs()); This works correctly when no virtuals are allocated, and it bypasses the to/from index conversions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123130 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-09Use IndexedMap for MachineRegisterInfo as well. No functional change.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123106 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-08Use an IndexedMap for LiveVariables::VirtRegInfo.Jakob Stoklund Olesen
Provide MRI::getNumVirtRegs() and TRI::index2VirtReg() functions to allow iteration over virtual registers without depending on the representation of virtual register numbers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123098 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-06Add MachineRegisterInfo::constrainRegClass and use it in MachineCSE.Jakob Stoklund Olesen
This function is intended to be used when inserting a machine instruction that trivially restricts the legal registers, like LEA requiring a GR32_NOSP argument. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115875 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29Begin implementation of an inline spiller.Jakob Stoklund Olesen
InlineSpiller inserts loads and spills immediately instead of deferring to VirtRegMap. This is possible now because SlotIndexes allows instructions to be inserted and renumbered. This is work in progress, and is mostly a copy of TrivialSpiller so far. It works very well for functions that don't require spilling. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107227 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Start TargetRegisterClass indices at 0 instead of 1, so thatDan Gohman
MachineRegisterInfo doesn't have to confusingly allocate an extra entry. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106296 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-24Avoid adding duplicate function live-in's.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104560 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21constify accessor.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104325 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-15Add reg_nodbg_iteratorJakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103856 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-13Add a utility function for conservatively clearing kill flags, and makeDan Gohman
use of it in MachineCSE. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103726 91177308-0d34-0410-b5e6-96231b3b80d8
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