diff options
Diffstat (limited to 'test/MC')
46 files changed, 6743 insertions, 181 deletions
diff --git a/test/MC/ARM/AlignedBundling/group-bundle-arm.s b/test/MC/ARM/AlignedBundling/group-bundle-arm.s new file mode 100644 index 0000000000..823d9e0cb8 --- /dev/null +++ b/test/MC/ARM/AlignedBundling/group-bundle-arm.s @@ -0,0 +1,37 @@ +# RUN: llvm-mc -filetype=obj -triple armv7-linux-gnueabi %s -o - \ +# RUN: | llvm-objdump -no-show-raw-insn -triple armv7 -disassemble - | FileCheck %s + +# On ARM each instruction is 4 bytes long so padding for individual +# instructions should not be inserted. However, for bundle-locked groups +# it can be. + + .syntax unified + .text + .bundle_align_mode 4 + + bx lr + and r1, r1, r2 + and r1, r1, r2 + .bundle_lock + bx r9 + bx r8 + .bundle_unlock +# CHECK: c: nop +# CHECK-NEXT: 10: bx +# CHECK-NEXT: 14: bx + + # pow2 here + .align 4 + bx lr + .bundle_lock + bx r9 + bx r9 + bx r9 + bx r8 + .bundle_unlock +# CHECK: 20: bx +# CHECK-NEXT: 24: nop +# CHECK-NEXT: 28: nop +# CHECK-NEXT: 2c: nop +# CHECK-NEXT: 30: bx + diff --git a/test/MC/ARM/AlignedBundling/lit.local.cfg b/test/MC/ARM/AlignedBundling/lit.local.cfg new file mode 100644 index 0000000000..6c49f08b74 --- /dev/null +++ b/test/MC/ARM/AlignedBundling/lit.local.cfg @@ -0,0 +1,6 @@ +config.suffixes = ['.s'] + +targets = set(config.root.targets_to_build.split()) +if not 'X86' in targets: + config.unsupported = True + diff --git a/test/MC/ARM/AlignedBundling/pad-align-to-bundle-end.s b/test/MC/ARM/AlignedBundling/pad-align-to-bundle-end.s new file mode 100644 index 0000000000..341358b9db --- /dev/null +++ b/test/MC/ARM/AlignedBundling/pad-align-to-bundle-end.s @@ -0,0 +1,41 @@ +# RUN: llvm-mc -filetype=obj -triple armv7-linux-gnueabi %s -o - \ +# RUN: | llvm-objdump -no-show-raw-insn -triple armv7 -disassemble - | FileCheck %s + + .syntax unified + .text + .bundle_align_mode 4 + + bx lr + and r1, r1, r2 + and r1, r1, r2 + .bundle_lock align_to_end + bx r9 + .bundle_unlock +# No padding required here because bx just happens to be in the +# right offset. +# CHECK: 8: and +# CHECK-NEXT: c: bx + + bx lr + and r1, r1, r2 + .bundle_lock align_to_end + bx r9 + .bundle_unlock +# A 4-byte padding is needed here +# CHECK: 18: nop +# CHECK-NEXT: 1c: bx + + bx lr + and r1, r1, r2 + .bundle_lock align_to_end + bx r9 + bx r9 + bx r9 + .bundle_unlock +# A 12-byte padding is needed here to push the group to the end of the next +# bundle +# CHECK: 28: nop +# CHECK-NEXT: 2c: nop +# CHECK-NEXT: 30: nop +# CHECK-NEXT: 34: bx + diff --git a/test/MC/ARM/basic-thumb2-instructions.s b/test/MC/ARM/basic-thumb2-instructions.s index 23d9f5977a..d495c91c0e 100644 --- a/test/MC/ARM/basic-thumb2-instructions.s +++ b/test/MC/ARM/basic-thumb2-instructions.s @@ -3509,3 +3509,7 @@ _func: @ CHECK: ldrh.w r11, [pc, #-22] @ encoding: [0x3f,0xf8,0x16,0xb0] @ CHECK: ldrsb.w r11, [pc, #-22] @ encoding: [0x1f,0xf9,0x16,0xb0] @ CHECK: ldrsh.w r11, [pc, #-22] @ encoding: [0x3f,0xf9,0x16,0xb0] + +@ rdar://12596361 + ldr r1, [pc, #12] +@ CHECK: ldr.n r1, [pc, #12] @ encoding: [0x03,0x49] diff --git a/test/MC/ARM/data-in-code.ll b/test/MC/ARM/data-in-code.ll new file mode 100644 index 0000000000..c2feec5303 --- /dev/null +++ b/test/MC/ARM/data-in-code.ll @@ -0,0 +1,176 @@ +;; RUN: llc -O0 -mtriple=armv7-linux-gnueabi -filetype=obj %s -o - | \ +;; RUN: elf-dump | FileCheck -check-prefix=ARM %s + +;; RUN: llc -O0 -mtriple=thumbv7-linux-gnueabi -filetype=obj %s -o - | \ +;; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=TMB %s + +;; Ensure that if a jump table is generated that it has Mapping Symbols +;; marking the data-in-code region. + +define void @foo(i32* %ptr) nounwind ssp { + %tmp = load i32* %ptr, align 4 + switch i32 %tmp, label %default [ + i32 11, label %bb0 + i32 10, label %bb1 + i32 8, label %bb2 + i32 4, label %bb3 + i32 2, label %bb4 + i32 6, label %bb5 + i32 9, label %bb6 + i32 15, label %bb7 + i32 1, label %bb8 + i32 3, label %bb9 + i32 5, label %bb10 + i32 30, label %bb11 + i32 31, label %bb12 + i32 13, label %bb13 + i32 14, label %bb14 + i32 20, label %bb15 + i32 19, label %bb16 + i32 17, label %bb17 + i32 18, label %bb18 + i32 21, label %bb19 + i32 22, label %bb20 + i32 16, label %bb21 + i32 24, label %bb22 + i32 25, label %bb23 + i32 26, label %bb24 + i32 27, label %bb25 + i32 28, label %bb26 + i32 23, label %bb27 + i32 12, label %bb28 + ] + +default: + br label %exit +bb0: + br label %exit +bb1: + br label %exit +bb2: + br label %exit +bb3: + br label %exit +bb4: + br label %exit +bb5: + br label %exit +bb6: + br label %exit +bb7: + br label %exit +bb8: + br label %exit +bb9: + br label %exit +bb10: + br label %exit +bb11: + br label %exit +bb12: + br label %exit +bb13: + br label %exit +bb14: + br label %exit +bb15: + br label %exit +bb16: + br label %exit +bb17: + br label %exit +bb18: + br label %exit +bb19: + br label %exit +bb20: + br label %exit +bb21: + br label %exit +bb22: + br label %exit +bb23: + br label %exit +bb24: + br label %exit +bb25: + br label %exit +bb26: + br label %exit +bb27: + br label %exit +bb28: + br label %exit + + +exit: + + ret void +} + +;; ARM: # Symbol 2 +;; ARM-NEXT: $a +;; ARM-NEXT: 'st_value', 0x00000000 +;; ARM-NEXT: 'st_size', 0x00000000 +;; ARM-NEXT: 'st_bind', 0x0 +;; ARM-NEXT: 'st_type', 0x0 +;; ARM-NEXT: 'st_other' +;; ARM-NEXT: 'st_shndx', [[MIXED_SECT:0x[0-9a-f]+]] + +;; ARM: # Symbol 3 +;; ARM-NEXT: $a +;; ARM-NEXT: 'st_value', 0x000000ac +;; ARM-NEXT: 'st_size', 0x00000000 +;; ARM-NEXT: 'st_bind', 0x0 +;; ARM-NEXT: 'st_type', 0x0 +;; ARM-NEXT: 'st_other' +;; ARM-NEXT: 'st_shndx', [[MIXED_SECT]] + +;; ARM: # Symbol 4 +;; ARM-NEXT: $d +;; ARM-NEXT: 'st_value', 0x00000000 +;; ARM-NEXT: 'st_size', 0x00000000 +;; ARM-NEXT: 'st_bind', 0x0 +;; ARM-NEXT: 'st_type', 0x0 + +;; ARM: # Symbol 5 +;; ARM-NEXT: $d +;; ARM-NEXT: 'st_value', 0x00000030 +;; ARM-NEXT: 'st_size', 0x00000000 +;; ARM-NEXT: 'st_bind', 0x0 +;; ARM-NEXT: 'st_type', 0x0 +;; ARM-NEXT: 'st_other' +;; ARM-NEXT: 'st_shndx', [[MIXED_SECT]] + +;; ARM-NOT: ${{[atd]}} + +;; TMB: # Symbol 3 +;; TMB-NEXT: $d +;; TMB-NEXT: 'st_value', 0x00000016 +;; TMB-NEXT: 'st_size', 0x00000000 +;; TMB-NEXT: 'st_bind', 0x0 +;; TMB-NEXT: 'st_type', 0x0 +;; TMB-NEXT: 'st_other' +;; TMB-NEXT: 'st_shndx', [[MIXED_SECT:0x[0-9a-f]+]] + +;; TMB: # Symbol 4 +;; TMB-NEXT: $t +;; TMB-NEXT: 'st_value', 0x00000000 +;; TMB-NEXT: 'st_size', 0x00000000 +;; TMB-NEXT: 'st_bind', 0x0 +;; TMB-NEXT: 'st_type', 0x0 +;; TMB-NEXT: 'st_other' +;; TMB-NEXT: 'st_shndx', [[MIXED_SECT]] + +;; TMB: # Symbol 5 +;; TMB-NEXT: $t +;; TMB-NEXT: 'st_value', 0x00000036 +;; TMB-NEXT: 'st_size', 0x00000000 +;; TMB-NEXT: 'st_bind', 0x0 +;; TMB-NEXT: 'st_type', 0x0 +;; TMB-NEXT: 'st_other' +;; TMB-NEXT: 'st_shndx', [[MIXED_SECT]] + + +;; TMB-NOT: ${{[atd]}} + diff --git a/test/MC/ARM/elf-reloc-01.ll b/test/MC/ARM/elf-reloc-01.ll index c98026b6a0..3ebd7c641b 100644 --- a/test/MC/ARM/elf-reloc-01.ll +++ b/test/MC/ARM/elf-reloc-01.ll @@ -62,9 +62,9 @@ declare void @exit(i32) noreturn nounwind ;; OBJ: Relocation 1 ;; OBJ-NEXT: 'r_offset', -;; OBJ-NEXT: 'r_sym', 0x000002 +;; OBJ-NEXT: 'r_sym', 0x000007 ;; OBJ-NEXT: 'r_type', 0x2b -;; OBJ: Symbol 2 +;; OBJ: Symbol 7 ;; OBJ-NEXT: '_MergedGlobals' ;; OBJ-NEXT: 'st_value', 0x00000010 diff --git a/test/MC/ARM/elf-reloc-02.ll b/test/MC/ARM/elf-reloc-02.ll index e51bac30ca..6b6b03c388 100644 --- a/test/MC/ARM/elf-reloc-02.ll +++ b/test/MC/ARM/elf-reloc-02.ll @@ -42,9 +42,9 @@ declare i32 @write(...) declare void @exit(i32) noreturn nounwind ;; OBJ: Relocation 0 -;; OBJ-NEXT: 'r_offset', -;; OBJ-NEXT: 'r_sym', 0x000002 +;; OBJ-NEXT: 'r_offset', +;; OBJ-NEXT: 'r_sym', 0x000005 ;; OBJ-NEXT: 'r_type', 0x2b -;; OBJ: Symbol 2 +;; OBJ: Symbol 5 ;; OBJ-NEXT: '.L.str' diff --git a/test/MC/ARM/elf-reloc-03.ll b/test/MC/ARM/elf-reloc-03.ll index 922242f9d3..87f91c1121 100644 --- a/test/MC/ARM/elf-reloc-03.ll +++ b/test/MC/ARM/elf-reloc-03.ll @@ -89,9 +89,9 @@ entry: declare void @exit(i32) noreturn nounwind ;; OBJ: Relocation 1 -;; OBJ-NEXT: 'r_offset', -;; OBJ-NEXT: 'r_sym', 0x00000c +;; OBJ-NEXT: 'r_offset', +;; OBJ-NEXT: 'r_sym', 0x000010 ;; OBJ-NEXT: 'r_type', 0x2b -;; OBJ: Symbol 12 +;; OBJ: Symbol 16 ;; OBJ-NEXT: 'vtable' diff --git a/test/MC/ARM/elf-reloc-condcall.s b/test/MC/ARM/elf-reloc-condcall.s index 08b4ecc9c7..3fafb43eb0 100644 --- a/test/MC/ARM/elf-reloc-condcall.s +++ b/test/MC/ARM/elf-reloc-condcall.s @@ -9,25 +9,25 @@ // OBJ: .rel.text // OBJ: 'r_offset', 0x00000000 -// OBJ-NEXT: 'r_sym', 0x000004 +// OBJ-NEXT: 'r_sym', 0x000005 // OBJ-NEXT: 'r_type', 0x1d // OBJ: 'r_offset', 0x00000004 -// OBJ-NEXT: 'r_sym', 0x000004 +// OBJ-NEXT: 'r_sym', 0x000005 // OBJ-NEXT: 'r_type', 0x1c // OBJ: 'r_offset', 0x00000008 -// OBJ-NEXT: 'r_sym', 0x000004 +// OBJ-NEXT: 'r_sym', 0x000005 // OBJ-NEXT: 'r_type', 0x1c // OBJ: 'r_offset', 0x0000000c -// OBJ-NEXT: 'r_sym', 0x000004 +// OBJ-NEXT: 'r_sym', 0x000005 // OBJ-NEXT: 'r_type', 0x1d // OBJ: 'r_offset', 0x00000010 -// OBJ-NEXT: 'r_sym', 0x000004 +// OBJ-NEXT: 'r_sym', 0x000005 // OBJ-NEXT: 'r_type', 0x1d // OBJ: .symtab -// OBJ: Symbol 4 +// OBJ: Symbol 5 // OBJ-NEXT: some_label diff --git a/test/MC/ARM/elf-thumbfunc-reloc.ll b/test/MC/ARM/elf-thumbfunc-reloc.ll index ecac11daa3..b2f253d2fa 100644 --- a/test/MC/ARM/elf-thumbfunc-reloc.ll +++ b/test/MC/ARM/elf-thumbfunc-reloc.ll @@ -28,10 +28,10 @@ entry: ; 00000008 0000070a R_ARM_THM_CALL 00000001 foo ; CHECK: Relocation 0 ; CHECK-NEXT: 'r_offset', 0x00000008 -; CHECK-NEXT: 'r_sym', 0x000007 +; CHECK-NEXT: 'r_sym', 0x000009 ; CHECK-NEXT: 'r_type', 0x0a ; make sure foo is thumb function: bit 0 = 1 -; CHECK: Symbol 7 +; CHECK: Symbol 9 ; CHECK-NEXT: 'foo' ; CHECK-NEXT: 'st_value', 0x00000001 diff --git a/test/MC/ARM/elf-thumbfunc.s b/test/MC/ARM/elf-thumbfunc.s index 0aa7f41cc4..91b2eee759 100644 --- a/test/MC/ARM/elf-thumbfunc.s +++ b/test/MC/ARM/elf-thumbfunc.s @@ -12,7 +12,7 @@ foo: bx lr @@ make sure foo is thumb function: bit 0 = 1 (st_value) -@CHECK: Symbol 4 +@CHECK: Symbol 5 @CHECK-NEXT: 'st_name', 0x00000001 @CHECK-NEXT: 'st_value', 0x00000001 @CHECK-NEXT: 'st_size', 0x00000000 diff --git a/test/MC/ARM/mapping-within-section.s b/test/MC/ARM/mapping-within-section.s new file mode 100644 index 0000000000..56dd6ef07e --- /dev/null +++ b/test/MC/ARM/mapping-within-section.s @@ -0,0 +1,33 @@ +@ RUN: llvm-mc -triple=arm-linux-gnueabi -filetype=obj < %s | llvm-objdump -t - | FileCheck %s + + .text +@ $a at 0x0000 + add r0, r0, r0 +@ $d at 0x0004 + .word 42 + .thumb +@ $t at 0x0008 + adds r0, r0, r0 + adds r0, r0, r0 +@ $a at 0x000c + .arm + add r0, r0, r0 +@ $t at 0x0010 + .thumb + adds r0, r0, r0 +@ $d at 0x0012 + .ascii "012" + .byte 1 + .byte 2 + .byte 3 +@ $a at 0x0018 + .arm + add r0, r0, r0 + +@ CHECK: 00000000 .text 00000000 $a +@ CHECK-NEXT: 0000000c .text 00000000 $a +@ CHECK-NEXT: 00000018 .text 00000000 $a +@ CHECK-NEXT: 00000004 .text 00000000 $d +@ CHECK-NEXT: 00000012 .text 00000000 $d +@ CHECK-NEXT: 00000008 .text 00000000 $t +@ CHECK-NEXT: 00000010 .text 00000000 $t diff --git a/test/MC/ARM/multi-section-mapping.s b/test/MC/ARM/multi-section-mapping.s new file mode 100644 index 0000000000..f7c4e89a85 --- /dev/null +++ b/test/MC/ARM/multi-section-mapping.s @@ -0,0 +1,35 @@ +@ RUN: llvm-mc -triple=arm-linux-gnueabi -filetype=obj < %s | llvm-objdump -t - | FileCheck %s + + .text + add r0, r0, r0 + +@ .wibble should *not* inherit .text's mapping symbol. It's a completely different section. + .section .wibble + add r0, r0, r0 + +@ A section should be able to start with a $t + .section .starts_thumb + .thumb + adds r0, r0, r0 + +@ A setion should be able to start with a $d + .section .starts_data + .word 42 + +@ Changing back to .text should not emit a redundant $a + .text + .arm + add r0, r0, r0 + +@ With all those constraints, we want: +@ + .text to have $a at 0 and no others +@ + .wibble to have $a at 0 +@ + .starts_thumb to have $t at 0 +@ + .starts_data to have $d at 0 + +@ CHECK: 00000000 .text 00000000 $a +@ CHECK-NEXT: 00000000 .wibble 00000000 $a +@ CHECK-NEXT: 00000000 .starts_data 00000000 $d +@ CHECK-NEXT: 00000000 .starts_thumb 00000000 $t +@ CHECK-NOT: ${{[adt]}} + diff --git a/test/MC/ARM/relocated-mapping.s b/test/MC/ARM/relocated-mapping.s new file mode 100644 index 0000000000..3bed14c452 --- /dev/null +++ b/test/MC/ARM/relocated-mapping.s @@ -0,0 +1,11 @@ +@ RUN: llvm-mc -triple=arm-linux-gnueabi -filetype=obj < %s | llvm-objdump -t - | FileCheck %s + +@ Implementation-detail test (unfortunately): values that are relocated do not +@ go via MCStreamer::EmitBytes; make sure they still emit a mapping symbol. + add r0, r0, r0 + .word somewhere + add r0, r0, r0 + +@ CHECK: 00000000 .text 00000000 $a +@ CHECK-NEXT: 00000008 .text 00000000 $a +@ CHECK-NEXT: 00000004 .text 00000000 $d diff --git a/test/MC/Disassembler/X86/enhanced.txt b/test/MC/Disassembler/X86/enhanced.txt deleted file mode 100644 index 97b0fa4ab5..0000000000 --- a/test/MC/Disassembler/X86/enhanced.txt +++ /dev/null @@ -1,10 +0,0 @@ -# RUN: llvm-mc --edis %s -triple=x86_64-apple-darwin9 2>&1 | FileCheck %s - -# CHECK: [o:jne][w: ][0-p:-][0-l:10=10] <br> 0:[RIP/{{[0-9]+}}](pc)=18446744073709551606 -0x0f 0x85 0xf6 0xff 0xff 0xff -# CHECK: [o:movq][w: ][1-r:%gs=r{{[0-9]+}}][1-p::][1-l:8=8][p:,][w: ][0-r:%rcx=r{{[0-9]+}}] <mov> 0:[RCX/{{[0-9]+}}]=0 1:[GS/{{[0-9]+}}]=8 -0x65 0x48 0x8b 0x0c 0x25 0x08 0x00 0x00 0x00 -# CHECK: [o:xorps][w: ][2-r:%xmm1=r{{[0-9]+}}][p:,][w: ][0-r:%xmm2=r{{[0-9]+}}] 0:[XMM2/{{[0-9]+}}]=0 1:[XMM2/{{[0-9]+}}]=0 2:[XMM1/{{[0-9]+}}]=0 -0x0f 0x57 0xd1 -# CHECK: [o:andps][w: ][2-r:%xmm1=r{{[0-9]+}}][p:,][w: ][0-r:%xmm2=r{{[0-9]+}}] 0:[XMM2/{{[0-9]+}}]=0 1:[XMM2/{{[0-9]+}}]=0 2:[XMM1/{{[0-9]+}}]=0 -0x0f 0x54 0xd1 diff --git a/test/MC/Disassembler/X86/simple-tests.txt b/test/MC/Disassembler/X86/simple-tests.txt index 672d239243..5ea40eb913 100644 --- a/test/MC/Disassembler/X86/simple-tests.txt +++ b/test/MC/Disassembler/X86/simple-tests.txt @@ -120,13 +120,13 @@ # CHECK: vandps (%rdx), %xmm1, %xmm7 0xc5 0xf0 0x54 0x3a -# CHECK: vcvtss2sil %xmm0, %eax +# CHECK: vcvtss2si %xmm0, %eax 0xc5 0xfa 0x2d 0xc0 -# CHECK: vcvtsd2sil %xmm0, %eax +# CHECK: vcvtsd2si %xmm0, %eax 0xc5 0xfb 0x2d 0xc0 -# CHECK: vcvtsd2siq %xmm0, %rax +# CHECK: vcvtsd2si %xmm0, %rax 0xc4 0xe1 0xfb 0x2d 0xc0 # CHECK: vmaskmovpd %xmm0, %xmm1, (%rax) @@ -437,10 +437,10 @@ # CHECK: vroundsd $0, %xmm0, %xmm0, %xmm0 0xc4 0xe3 0x7d 0x0b 0xc0 0x00 -# CHECK: vcvtsd2sil %xmm0, %eax +# CHECK: vcvtsd2si %xmm0, %eax 0xc4 0xe1 0x7f 0x2d 0xc0 -# CHECK: vcvtsd2siq %xmm0, %rax +# CHECK: vcvtsd2si %xmm0, %rax 0xc4 0xe1 0xff 0x2d 0xc0 # CHECK: vucomisd %xmm1, %xmm0 diff --git a/test/MC/Disassembler/X86/x86-32.txt b/test/MC/Disassembler/X86/x86-32.txt index 899657b0d4..99d49943b1 100644 --- a/test/MC/Disassembler/X86/x86-32.txt +++ b/test/MC/Disassembler/X86/x86-32.txt @@ -156,13 +156,13 @@ # CHECK: vandps (%edx), %xmm1, %xmm7 0xc5 0xf0 0x54 0x3a -# CHECK: vcvtss2sil %xmm0, %eax +# CHECK: vcvtss2si %xmm0, %eax 0xc5 0xfa 0x2d 0xc0 -# CHECK: vcvtsd2sil %xmm0, %eax +# CHECK: vcvtsd2si %xmm0, %eax 0xc5 0xfb 0x2d 0xc0 -# CHECK: vcvtsd2sil %xmm0, %eax +# CHECK: vcvtsd2si %xmm0, %eax 0xc4 0xe1 0x7b 0x2d 0xc0 # CHECK: vmaskmovpd %xmm0, %xmm1, (%eax) @@ -460,10 +460,10 @@ # CHECK: vroundsd $0, %xmm0, %xmm0, %xmm0 0xc4 0xe3 0x7d 0x0b 0xc0 0x00 -# CHECK: vcvtsd2sil %xmm0, %eax +# CHECK: vcvtsd2si %xmm0, %eax 0xc4 0xe1 0x7f 0x2d 0xc0 -# CHECK: vcvtsd2sil %xmm0, %eax +# CHECK: vcvtsd2si %xmm0, %eax 0xc4 0xe1 0xff 0x2d 0xc0 # CHECK: vucomisd %xmm1, %xmm0 diff --git a/test/MC/Disassembler/XCore/lit.local.cfg b/test/MC/Disassembler/XCore/lit.local.cfg new file mode 100644 index 0000000000..15b65836e7 --- /dev/null +++ b/test/MC/Disassembler/XCore/lit.local.cfg @@ -0,0 +1,5 @@ +config.suffixes = ['.txt'] + +targets = set(config.root.targets_to_build.split()) +if not 'XCore' in targets: + config.unsupported = True diff --git a/test/MC/Disassembler/XCore/xcore.txt b/test/MC/Disassembler/XCore/xcore.txt new file mode 100644 index 0000000000..f6b9c90da0 --- /dev/null +++ b/test/MC/Disassembler/XCore/xcore.txt @@ -0,0 +1,198 @@ +# RUN: llvm-mc --disassemble %s -triple=xcore-xmos-elf | FileCheck %s +# CHECK: .section __TEXT,__text,regular,pure_instructions + +# 0r instructions + +# CHECK: clre +0xed 0x07 + +# CHECK: get r11, id +0xee 0x17 + +# CHECK: get r11, ed +0xfe 0x0f + +# CHECK: get r11, et +0xff 0x0f + +# CHECK: ssync +0xee 0x07 + +# CHECK: waiteu +0xec 0x07 + +# 1r instructions + +# CHECK: msync res[r0] +0xf0 0x1f + +# CHECK: mjoin res[r1] +0xf1 0x17 + +# CHECK: bau r2 +0xf2 0x27 + +# CHECK: set sp, r3 +0xf3 0x2f + +# CHECK: ecallt r4 +0xf4 0x4f + +# CHECK: ecallf r5 +0xe5 0x4f + +# CHECK: bla r6 +0xe6 0x27 + +# CHECK: syncr res[r7] +0xf7 0x87 + +# CHECK: freer res[r8] +0xe8 0x17 + +# CHECK: setv res[r9], r11 +0xf9 0x47 + +# CHECK: setev res[r10], r11 +0xfa 0x3f + +# CHECK: eeu res[r11] +0xfb 0x07 + +# 2r instructions + +# CHECK: not r1, r8 +0x24 0x8f + +# CHECK: neg r7, r6 +0xce 0x97 + +# CHECK: andnot r10, r11 +0xab 0x2f + +# CHECK: mkmsk r11, r0 +0x4c 0xa7 + +# CHECK: getts r8, res[r1] +0x41 0x3f + +# CHECK: setpt res[r2], r3 +0xde 0x3e + +# CHECK: outct res[r1], r2 +0xc6 0x4e + +# CHECK: outt res[r5], r4 +0xd1 0x0f + +# CHECK: out res[r9], r10 +0xa9 0xaf + +# CHECK: outshr res[r0], r2 +0xd8 0xae + +# CHECK: inct r7, res[r4] +0xdc 0x87 + +# CHECK: int r8, res[r3] +0x53 0x8f + +# CHECK: in r10, res[r0] +0x48 0xb7 + +# CHECK: inshr r4, res[r2] +0x12 0xb7 + +# CHECK: chkct res[r6], r0 +0x08 0xcf + +# CHECK: testct r8, res[r3] +0x53 0xbf + +# CHECK: testwct r2, res[r9] +0x39 0xc7 + +# CHECK: setd res[r3], r4 +0x13 0x17 + +# CHECK: getst r7, res[r1] +0x1d 0x07 + +# CHECK: init t[r1]:sp, r2 +0xc9 0x16 + +# CHECK: init t[r10]:pc, r1 +0x26 0x07 + +# CHECK: init t[r2]:cp, r10 +0x4a 0x1f + +# CHECK: init t[r2]:dp, r3 +0xce 0x0e + +# CHECK: setpsc res[r8], r2 +0x28 0xc7 + +# CHECK: zext r3, r8 +0x2c 0x47 + +# CHECK: sext r9, r1 +0x45 0x37 + +# rus instructions + +# CHECK: chkct res[r1], 8 +0x34 0xcf + +# CHECK: getr r11, 2 +0x4e 0x87 + +# CHECK: mkmsk r4, 24 +0x72 0xa7 + +# CHECK: outct res[r3], r0 +0xcc 0x4e + +# CHECK: sext r8, 16 +0xb1 0x37 + +# CHECK: zext r2, 32 +0xd8 0x46 + +# CHECK: peek r0, res[r5] +0x81 0xbf + +# CHECK: endin r10, res[r1] +0x59 0x97 + +# l2r instructions + +# CHECK: bitrev r1, r10 +0x26 0xff 0xec 0x07 + +# CHECK: byterev r4, r1 +0x11 0xff 0xec 0x07 + +# CHECK: clz r11, r10 +0xae 0xff 0xec 0x0f + +# CHECK: get r3, ps[r6] +0x9e 0xff 0xec 0x17 + +# CHECK: setc res[r5], r9 +0x75 0xff 0xec 0x2f + +# CHECK: init t[r2]:lr, r1 +0xc6 0xfe 0xec 0x17 + +# CHECK: setclk res[r2], r1 +0xd6 0xfe 0xec 0x0f + +# CHECK: set ps[r9], r10 +0xa9 0xff 0xec 0x1f + +# CHECK: setrdy res[r3], r1 +0xc7 0xfe 0xec 0x2f + +# CHECK: settw res[r7], r2 +0x9b 0xff 0xec 0x27 diff --git a/test/MC/ELF/comp-dir.s b/test/MC/ELF/comp-dir.s new file mode 100644 index 0000000000..50d10eb9a5 --- /dev/null +++ b/test/MC/ELF/comp-dir.s @@ -0,0 +1,7 @@ +// RUN: llvm-mc -triple=x86_64-linux-unknown -g -fdebug-compilation-dir=/test/comp/dir %s -filetype=obj -o %t.o +// RUN: llvm-dwarfdump %t.o | FileCheck %s + |