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-rw-r--r--test/CodeGen/ARM/aliases.ll2
-rw-r--r--test/CodeGen/Alpha/add.ll2
-rw-r--r--test/CodeGen/CPP/2009-05-01-Long-Double.ll2
-rw-r--r--test/CodeGen/CPP/2009-05-04-CondBr.ll2
-rw-r--r--test/CodeGen/CellSPU/rotate_ops.ll2
-rw-r--r--test/CodeGen/Generic/Makefile4
-rw-r--r--test/CodeGen/Generic/nested-select.ll2
-rw-r--r--test/CodeGen/Generic/switch-lower-feature-2.ll2
-rw-r--r--test/CodeGen/Mips/2008-06-05-Carry.ll2
-rw-r--r--test/CodeGen/Mips/2008-07-07-IntDoubleConvertions.ll2
-rw-r--r--test/CodeGen/Mips/2008-07-15-InternalConstant.ll2
-rw-r--r--test/CodeGen/Mips/2008-07-15-SmallSection.ll4
-rw-r--r--test/CodeGen/Mips/2008-07-16-SignExtInReg.ll2
-rw-r--r--test/CodeGen/Mips/2008-07-22-Cstpool.ll2
-rw-r--r--test/CodeGen/Mips/2008-07-23-fpcmp.ll2
-rw-r--r--test/CodeGen/Mips/2008-07-31-fcopysign.ll2
-rw-r--r--test/CodeGen/Mips/2008-08-01-AsmInline.ll2
-rw-r--r--test/CodeGen/Mips/2008-08-03-fabs64.ll2
-rw-r--r--test/CodeGen/Mips/2008-08-04-Bitconvert.ll2
-rw-r--r--test/CodeGen/Mips/2008-08-07-CC.ll2
-rw-r--r--test/CodeGen/PowerPC/Frames-small.ll8
-rw-r--r--test/CodeGen/PowerPC/addc.ll2
-rw-r--r--test/CodeGen/PowerPC/and_add.ll2
-rw-r--r--test/CodeGen/PowerPC/mulhs.ll2
-rw-r--r--test/CodeGen/PowerPC/rlwimi2.ll2
-rw-r--r--test/CodeGen/PowerPC/rlwinm.ll2
-rw-r--r--test/CodeGen/PowerPC/rlwinm2.ll2
-rw-r--r--test/CodeGen/PowerPC/stfiwx.ll4
-rw-r--r--test/CodeGen/PowerPC/subc.ll2
-rw-r--r--test/CodeGen/PowerPC/vec_br_cmp.ll2
-rw-r--r--test/CodeGen/PowerPC/vec_splat.ll2
-rw-r--r--test/CodeGen/PowerPC/vec_vrsave.ll2
-rw-r--r--test/CodeGen/X86/2009-03-25-TestBug.ll2
-rw-r--r--test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll2
-rw-r--r--test/CodeGen/X86/aliases.ll2
-rw-r--r--test/CodeGen/X86/atomic_op.ll2
-rw-r--r--test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll2
-rw-r--r--test/CodeGen/X86/dagcombine-buildvector.ll2
-rw-r--r--test/CodeGen/X86/extract-combine.ll2
-rw-r--r--test/CodeGen/X86/iv-users-in-other-loops.ll2
-rw-r--r--test/CodeGen/X86/legalizedag_vec.ll2
-rw-r--r--test/CodeGen/X86/mingw-alloca.ll2
-rw-r--r--test/CodeGen/X86/neg_fp.ll4
-rw-r--r--test/CodeGen/X86/pic-1.ll2
-rw-r--r--test/CodeGen/X86/pic-2.ll2
-rw-r--r--test/CodeGen/X86/pic-4.ll2
-rw-r--r--test/CodeGen/X86/pic-5.ll2
-rw-r--r--test/CodeGen/X86/pic-6.ll2
-rw-r--r--test/CodeGen/X86/pic-cpool.ll2
-rw-r--r--test/CodeGen/X86/pic-jtbl.ll2
-rw-r--r--test/CodeGen/X86/scalar-extract.ll2
-rw-r--r--test/CodeGen/X86/vec_clear.ll2
-rw-r--r--test/CodeGen/X86/vec_extract-sse4.ll2
-rw-r--r--test/CodeGen/X86/vec_extract.ll2
-rw-r--r--test/CodeGen/X86/vec_i64.ll2
-rw-r--r--test/CodeGen/X86/vec_insert-8.ll2
-rw-r--r--test/CodeGen/X86/vec_set-3.ll2
-rw-r--r--test/CodeGen/X86/vec_set-5.ll2
-rw-r--r--test/CodeGen/X86/vec_set-6.ll2
-rw-r--r--test/CodeGen/X86/vec_shuffle-10.ll2
-rw-r--r--test/CodeGen/X86/vec_shuffle-16.ll4
-rw-r--r--test/CodeGen/X86/vec_shuffle-22.ll4
-rw-r--r--test/CodeGen/X86/vec_shuffle-25.ll2
-rw-r--r--test/CodeGen/X86/vec_shuffle-26.ll2
-rw-r--r--test/CodeGen/X86/vec_shuffle-27.ll2
-rw-r--r--test/CodeGen/X86/vec_shuffle-28.ll2
-rw-r--r--test/CodeGen/X86/vec_shuffle-3.ll2
-rw-r--r--test/CodeGen/X86/vec_shuffle-30.ll2
-rw-r--r--test/CodeGen/X86/vec_shuffle-31.ll2
-rw-r--r--test/CodeGen/X86/vec_shuffle-35.ll4
-rw-r--r--test/CodeGen/X86/vec_shuffle-36.ll2
-rw-r--r--test/CodeGen/X86/vec_shuffle-5.ll2
-rw-r--r--test/CodeGen/X86/vec_shuffle-6.ll2
-rw-r--r--test/CodeGen/X86/vec_shuffle-7.ll2
-rw-r--r--test/CodeGen/X86/vec_shuffle-9.ll2
-rw-r--r--test/CodeGen/X86/vec_shuffle.ll2
-rw-r--r--test/CodeGen/X86/vec_splat-3.ll2
-rw-r--r--test/CodeGen/X86/vec_splat-4.ll2
-rw-r--r--test/CodeGen/X86/vec_ss_load_fold.ll2
-rw-r--r--test/CodeGen/X86/vshift-1.ll2
-rw-r--r--test/CodeGen/X86/vshift-2.ll4
-rw-r--r--test/CodeGen/X86/vshift-3.ll4
-rw-r--r--test/CodeGen/X86/vshift-4.ll2
-rw-r--r--test/CodeGen/X86/widen_arith-1.ll2
-rw-r--r--test/CodeGen/X86/widen_arith-2.ll2
-rw-r--r--test/CodeGen/X86/widen_arith-3.ll2
-rw-r--r--test/CodeGen/X86/widen_arith-4.ll2
-rw-r--r--test/CodeGen/X86/widen_arith-5.ll2
-rw-r--r--test/CodeGen/X86/widen_arith-6.ll2
-rw-r--r--test/CodeGen/X86/widen_cast-1.ll2
-rw-r--r--test/CodeGen/X86/widen_cast-2.ll2
-rw-r--r--test/CodeGen/X86/widen_cast-3.ll2
-rw-r--r--test/CodeGen/X86/widen_cast-4.ll2
-rw-r--r--test/CodeGen/X86/widen_cast-5.ll2
-rw-r--r--test/CodeGen/X86/widen_cast-6.ll2
-rw-r--r--test/CodeGen/X86/widen_conv-1.ll2
-rw-r--r--test/CodeGen/X86/widen_conv-2.ll2
-rw-r--r--test/CodeGen/X86/widen_conv-3.ll2
-rw-r--r--test/CodeGen/X86/widen_conv-4.ll2
-rw-r--r--test/CodeGen/X86/widen_select-1.ll2
-rw-r--r--test/CodeGen/X86/widen_shuffle-1.ll2
-rw-r--r--test/CodeGen/X86/widen_shuffle-2.ll2
-rw-r--r--test/CodeGen/X86/x86-64-mem.ll4
-rw-r--r--test/CodeGen/X86/x86-64-pic-1.ll2
-rw-r--r--test/CodeGen/X86/x86-64-pic-10.ll2
-rw-r--r--test/CodeGen/X86/x86-64-pic-11.ll2
-rw-r--r--test/CodeGen/X86/x86-64-pic-2.ll2
-rw-r--r--test/CodeGen/X86/x86-64-pic-3.ll2
-rw-r--r--test/CodeGen/X86/x86-64-pic-4.ll2
-rw-r--r--test/CodeGen/X86/x86-64-pic-5.ll2
-rw-r--r--test/CodeGen/X86/x86-64-pic-6.ll2
-rw-r--r--test/CodeGen/X86/x86-64-pic-7.ll2
-rw-r--r--test/CodeGen/X86/x86-64-pic-8.ll2
-rw-r--r--test/CodeGen/X86/x86-64-pic-9.ll2
114 files changed, 127 insertions, 127 deletions
diff --git a/test/CodeGen/ARM/aliases.ll b/test/CodeGen/ARM/aliases.ll
index 70b2c4d419..ea39da8332 100644
--- a/test/CodeGen/ARM/aliases.ll
+++ b/test/CodeGen/ARM/aliases.ll
@@ -1,5 +1,5 @@
; RUN: llvm-as < %s | \
-; RUN: llc -mtriple=arm-linux-gnueabi -o %t -f
+; RUN: llc -mtriple=arm-linux-gnueabi -o %t
; RUN: grep set %t | count 5
; RUN: grep globl %t | count 4
; RUN: grep weak %t | count 1
diff --git a/test/CodeGen/Alpha/add.ll b/test/CodeGen/Alpha/add.ll
index 260584b790..ad25a34989 100644
--- a/test/CodeGen/Alpha/add.ll
+++ b/test/CodeGen/Alpha/add.ll
@@ -1,6 +1,6 @@
;test all the shifted and signextending adds and subs with and without consts
;
-; RUN: llvm-as < %s | llc -march=alpha -o %t.s -f
+; RUN: llvm-as < %s | llc -march=alpha -o %t.s
; RUN: grep { addl} %t.s | count 2
; RUN: grep { addq} %t.s | count 2
; RUN: grep { subl} %t.s | count 2
diff --git a/test/CodeGen/CPP/2009-05-01-Long-Double.ll b/test/CodeGen/CPP/2009-05-01-Long-Double.ll
index 9d132ec00f..e2d2dd8c86 100644
--- a/test/CodeGen/CPP/2009-05-01-Long-Double.ll
+++ b/test/CodeGen/CPP/2009-05-01-Long-Double.ll
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=cpp -cppgen=program -f -o %t
+; RUN: llvm-as < %s | llc -march=cpp -cppgen=program -o %t
define x86_fp80 @some_func() nounwind {
entry:
diff --git a/test/CodeGen/CPP/2009-05-04-CondBr.ll b/test/CodeGen/CPP/2009-05-04-CondBr.ll
index 6c3f984282..5af9aa7d73 100644
--- a/test/CodeGen/CPP/2009-05-04-CondBr.ll
+++ b/test/CodeGen/CPP/2009-05-04-CondBr.ll
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=cpp -cppgen=program -f -o %t
+; RUN: llvm-as < %s | llc -march=cpp -cppgen=program -o %t
; RUN: grep "BranchInst::Create(label_if_then, label_if_end, int1_cmp, label_entry);" %t
define i32 @some_func(i32 %a) nounwind {
diff --git a/test/CodeGen/CellSPU/rotate_ops.ll b/test/CodeGen/CellSPU/rotate_ops.ll
index e308172486..9a10264c81 100644
--- a/test/CodeGen/CellSPU/rotate_ops.ll
+++ b/test/CodeGen/CellSPU/rotate_ops.ll
@@ -1,4 +1,4 @@
-; RUN: llvm-as -o - %s | llc -march=cellspu -f -o %t1.s
+; RUN: llvm-as -o - %s | llc -march=cellspu -o %t1.s
; RUN: grep rot %t1.s | count 85
; RUN: grep roth %t1.s | count 8
; RUN: grep roti.*5 %t1.s | count 1
diff --git a/test/CodeGen/Generic/Makefile b/test/CodeGen/Generic/Makefile
index d228f69a85..26ebc316a2 100644
--- a/test/CodeGen/Generic/Makefile
+++ b/test/CodeGen/Generic/Makefile
@@ -1,10 +1,10 @@
# Makefile for running ad-hoc custom LLVM tests
#
%.bc: %.ll
- llvm-as -f $<
+ llvm-as $<
%.llc.s: %.bc
- llc -f $< -o $@
+ llc $< -o $@
%.gcc.s: %.c
gcc -O0 -S $< -o $@
diff --git a/test/CodeGen/Generic/nested-select.ll b/test/CodeGen/Generic/nested-select.ll
index a723a4d742..6f45f0f4e9 100644
--- a/test/CodeGen/Generic/nested-select.ll
+++ b/test/CodeGen/Generic/nested-select.ll
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -o /dev/null -f
+; RUN: llvm-as < %s | llc -o /dev/null
; Test that select of a select works
diff --git a/test/CodeGen/Generic/switch-lower-feature-2.ll b/test/CodeGen/Generic/switch-lower-feature-2.ll
index 5e532a8db3..d3833e77e5 100644
--- a/test/CodeGen/Generic/switch-lower-feature-2.ll
+++ b/test/CodeGen/Generic/switch-lower-feature-2.ll
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86 -o %t -f
+; RUN: llvm-as < %s | llc -march=x86 -o %t
; RUN: grep jb %t | count 1
; RUN: grep \\\$6 %t | count 2
; RUN: grep 1024 %t | count 1
diff --git a/test/CodeGen/Mips/2008-06-05-Carry.ll b/test/CodeGen/Mips/2008-06-05-Carry.ll
index 9cd7c80577..800ba112d8 100644
--- a/test/CodeGen/Mips/2008-06-05-Carry.ll
+++ b/test/CodeGen/Mips/2008-06-05-Carry.ll
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=mips -f -o %t
+; RUN: llvm-as < %s | llc -march=mips -o %t
; RUN: grep subu %t | count 2
; RUN: grep addu %t | count 4
diff --git a/test/CodeGen/Mips/2008-07-07-IntDoubleConvertions.ll b/test/CodeGen/Mips/2008-07-07-IntDoubleConvertions.ll
index ab6a9c8eda..2f10a3f2a4 100644
--- a/test/CodeGen/Mips/2008-07-07-IntDoubleConvertions.ll
+++ b/test/CodeGen/Mips/2008-07-07-IntDoubleConvertions.ll
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=mips -f -o %t
+; RUN: llvm-as < %s | llc -march=mips -o %t
; RUN: grep __floatsidf %t | count 1
; RUN: grep __floatunsidf %t | count 1
; RUN: grep __fixdfsi %t | count 1
diff --git a/test/CodeGen/Mips/2008-07-15-InternalConstant.ll b/test/CodeGen/Mips/2008-07-15-InternalConstant.ll
index 4d218cf6b4..33b240bbc3 100644
--- a/test/CodeGen/Mips/2008-07-15-InternalConstant.ll
+++ b/test/CodeGen/Mips/2008-07-15-InternalConstant.ll
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=mips -f -o %t
+; RUN: llvm-as < %s | llc -march=mips -o %t
; RUN: grep {rodata.str1.4,"aMS",@progbits} %t | count 1
; RUN: grep {r.data,} %t | count 1
; RUN: grep {\%hi} %t | count 2
diff --git a/test/CodeGen/Mips/2008-07-15-SmallSection.ll b/test/CodeGen/Mips/2008-07-15-SmallSection.ll
index 0e3f864795..671fa9404e 100644
--- a/test/CodeGen/Mips/2008-07-15-SmallSection.ll
+++ b/test/CodeGen/Mips/2008-07-15-SmallSection.ll
@@ -1,5 +1,5 @@
-; RUN: llvm-as < %s | llc -mips-ssection-threshold=8 -march=mips -f -o %t0
-; RUN: llvm-as < %s | llc -mips-ssection-threshold=0 -march=mips -f -o %t1
+; RUN: llvm-as < %s | llc -mips-ssection-threshold=8 -march=mips -o %t0
+; RUN: llvm-as < %s | llc -mips-ssection-threshold=0 -march=mips -o %t1
; RUN: grep {sdata} %t0 | count 1
; RUN: grep {sbss} %t0 | count 1
; RUN: grep {gp_rel} %t0 | count 2
diff --git a/test/CodeGen/Mips/2008-07-16-SignExtInReg.ll b/test/CodeGen/Mips/2008-07-16-SignExtInReg.ll
index fc03bb5fef..a1523d1af2 100644
--- a/