diff options
Diffstat (limited to 'lib/Target')
46 files changed, 371 insertions, 273 deletions
diff --git a/lib/Target/ARM/ARMTargetMachine.cpp b/lib/Target/ARM/ARMTargetMachine.cpp index f0b176ad69..92f2f5bf40 100644 --- a/lib/Target/ARM/ARMTargetMachine.cpp +++ b/lib/Target/ARM/ARMTargetMachine.cpp @@ -62,25 +62,22 @@ extern "C" void LLVMInitializeARMTarget() { /// TargetMachine ctor - Create an ARM architecture model. /// -ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T, - const std::string &TT, - const std::string &CPU, - const std::string &FS) - : LLVMTargetMachine(T, TT, CPU, FS), +ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, + Reloc::Model RM) + : LLVMTargetMachine(T, TT, CPU, FS, RM), Subtarget(TT, CPU, FS), JITInfo(), InstrItins(Subtarget.getInstrItineraryData()) { - DefRelocModel = getRelocationModel(); - // Default to soft float ABI if (FloatABIType == FloatABI::Default) FloatABIType = FloatABI::Soft; } -ARMTargetMachine::ARMTargetMachine(const Target &T, const std::string &TT, - const std::string &CPU, - const std::string &FS) - : ARMBaseTargetMachine(T, TT, CPU, FS), InstrInfo(Subtarget), +ARMTargetMachine::ARMTargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, + Reloc::Model RM) + : ARMBaseTargetMachine(T, TT, CPU, FS, RM), InstrInfo(Subtarget), DataLayout(Subtarget.isAPCS_ABI() ? std::string("e-p:32:32-f64:32:64-i64:32:64-" "v128:32:128-v64:32:64-n32") : @@ -95,10 +92,10 @@ ARMTargetMachine::ARMTargetMachine(const Target &T, const std::string &TT, "support ARM mode execution!"); } -ThumbTargetMachine::ThumbTargetMachine(const Target &T, const std::string &TT, - const std::string &CPU, - const std::string &FS) - : ARMBaseTargetMachine(T, TT, CPU, FS), +ThumbTargetMachine::ThumbTargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, + Reloc::Model RM) + : ARMBaseTargetMachine(T, TT, CPU, FS, RM), InstrInfo(Subtarget.hasThumb2() ? ((ARMBaseInstrInfo*)new Thumb2InstrInfo(Subtarget)) : ((ARMBaseInstrInfo*)new Thumb1InstrInfo(Subtarget))), @@ -179,10 +176,6 @@ bool ARMBaseTargetMachine::addPreEmitPass(PassManagerBase &PM, bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, JITCodeEmitter &JCE) { - // FIXME: Move this to TargetJITInfo! - if (DefRelocModel == Reloc::Default) - setRelocationModel(Reloc::Static); - // Machine code emitter pass for ARM. PM.add(createARMJITCodeEmitterPass(*this, JCE)); return false; diff --git a/lib/Target/ARM/ARMTargetMachine.h b/lib/Target/ARM/ARMTargetMachine.h index bc3d46a50e..616ea9c3d2 100644 --- a/lib/Target/ARM/ARMTargetMachine.h +++ b/lib/Target/ARM/ARMTargetMachine.h @@ -37,11 +37,10 @@ protected: private: ARMJITInfo JITInfo; InstrItineraryData InstrItins; - Reloc::Model DefRelocModel; // Reloc model before it's overridden. public: - ARMBaseTargetMachine(const Target &T, const std::string &TT, - const std::string &CPU, const std::string &FS); + ARMBaseTargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, Reloc::Model RM); virtual ARMJITInfo *getJITInfo() { return &JITInfo; } virtual const ARMSubtarget *getSubtargetImpl() const { return &Subtarget; } @@ -69,8 +68,8 @@ class ARMTargetMachine : public ARMBaseTargetMachine { ARMSelectionDAGInfo TSInfo; ARMFrameLowering FrameLowering; public: - ARMTargetMachine(const Target &T, const std::string &TT, - const std::string &CPU, const std::string &FS); + ARMTargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, Reloc::Model RM); virtual const ARMRegisterInfo *getRegisterInfo() const { return &InstrInfo.getRegisterInfo(); @@ -108,8 +107,8 @@ class ThumbTargetMachine : public ARMBaseTargetMachine { // Either Thumb1FrameLowering or ARMFrameLowering. OwningPtr<ARMFrameLowering> FrameLowering; public: - ThumbTargetMachine(const Target &T, const std::string &TT, - const std::string &CPU, const std::string &FS); + ThumbTargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, Reloc::Model RM); /// returns either Thumb1RegisterInfo or Thumb2RegisterInfo virtual const ARMBaseRegisterInfo *getRegisterInfo() const { diff --git a/lib/Target/ARM/AsmParser/ARMAsmLexer.cpp b/lib/Target/ARM/AsmParser/ARMAsmLexer.cpp index d9a5fa223b..ebebcdc32c 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmLexer.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmLexer.cpp @@ -15,7 +15,7 @@ #include "llvm/MC/MCParser/MCParsedAsmOperand.h" #include "llvm/Target/TargetAsmLexer.h" -#include "llvm/Target/TargetMachine.h" +#include "llvm/Target/TargetMachine.h" // FIXME #include "llvm/Target/TargetRegistry.h" #include "llvm/ADT/OwningPtr.h" diff --git a/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp b/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp index 510f4ab65f..6d6bee2179 100644 --- a/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp +++ b/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp @@ -142,3 +142,17 @@ extern "C" void LLVMInitializeARMMCAsmInfo() { RegisterMCAsmInfoFn A(TheARMTarget, createARMMCAsmInfo); RegisterMCAsmInfoFn B(TheThumbTarget, createARMMCAsmInfo); } + +MCCodeGenInfo *createARMMCCodeGenInfo(StringRef TT, Reloc::Model RM) { + MCCodeGenInfo *X = new MCCodeGenInfo(); + if (RM == Reloc::Default) + RM = Reloc::DynamicNoPIC; + X->InitMCCodeGenInfo(RM); + return X; +} + +extern "C" void LLVMInitializeARMMCCodeGenInfo() { + TargetRegistry::RegisterMCCodeGenInfo(TheARMTarget, createARMMCCodeGenInfo); + TargetRegistry::RegisterMCCodeGenInfo(TheThumbTarget, createARMMCCodeGenInfo); +} + diff --git a/lib/Target/Alpha/AlphaTargetMachine.cpp b/lib/Target/Alpha/AlphaTargetMachine.cpp index 3b65d41be8..4cdd3ab483 100644 --- a/lib/Target/Alpha/AlphaTargetMachine.cpp +++ b/lib/Target/Alpha/AlphaTargetMachine.cpp @@ -22,19 +22,17 @@ extern "C" void LLVMInitializeAlphaTarget() { RegisterTargetMachine<AlphaTargetMachine> X(TheAlphaTarget); } -AlphaTargetMachine::AlphaTargetMachine(const Target &T, const std::string &TT, - const std::string &CPU, - const std::string &FS) - : LLVMTargetMachine(T, TT, CPU, FS), +AlphaTargetMachine::AlphaTargetMachine(const Target &T, StringRef TT, + StringRef CPU, + StringRef FS, Reloc::Model RM) + : LLVMTargetMachine(T, TT, CPU, FS, RM), DataLayout("e-f128:128:128-n64"), FrameLowering(Subtarget), Subtarget(TT, CPU, FS), TLInfo(*this), TSInfo(*this) { - setRelocationModel(Reloc::PIC_); } - //===----------------------------------------------------------------------===// // Pass Pipeline Configuration //===----------------------------------------------------------------------===// diff --git a/lib/Target/Alpha/AlphaTargetMachine.h b/lib/Target/Alpha/AlphaTargetMachine.h index cf00e5875d..1d930d0a5c 100644 --- a/lib/Target/Alpha/AlphaTargetMachine.h +++ b/lib/Target/Alpha/AlphaTargetMachine.h @@ -36,8 +36,8 @@ class AlphaTargetMachine : public LLVMTargetMachine { AlphaSelectionDAGInfo TSInfo; public: - AlphaTargetMachine(const Target &T, const std::string &TT, - const std::string &CPU, const std::string &FS); + AlphaTargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, Reloc::Model RM); virtual const AlphaInstrInfo *getInstrInfo() const { return &InstrInfo; } virtual const TargetFrameLowering *getFrameLowering() const { diff --git a/lib/Target/Alpha/MCTargetDesc/AlphaMCTargetDesc.cpp b/lib/Target/Alpha/MCTargetDesc/AlphaMCTargetDesc.cpp index 691b1aa89b..04bc434862 100644 --- a/lib/Target/Alpha/MCTargetDesc/AlphaMCTargetDesc.cpp +++ b/lib/Target/Alpha/MCTargetDesc/AlphaMCTargetDesc.cpp @@ -65,3 +65,15 @@ extern "C" void LLVMInitializeAlphaMCSubtargetInfo() { extern "C" void LLVMInitializeAlphaMCAsmInfo() { RegisterMCAsmInfo<AlphaMCAsmInfo> X(TheAlphaTarget); } + +MCCodeGenInfo *createAlphaMCCodeGenInfo(StringRef TT, Reloc::Model RM) { + MCCodeGenInfo *X = new MCCodeGenInfo(); + X->InitMCCodeGenInfo(Reloc::PIC_); + return X; +} + +extern "C" void LLVMInitializeAlphaMCCodeGenInfo() { + TargetRegistry::RegisterMCCodeGenInfo(TheAlphaTarget, + createAlphaMCCodeGenInfo); +} + diff --git a/lib/Target/Blackfin/BlackfinTargetMachine.cpp b/lib/Target/Blackfin/BlackfinTargetMachine.cpp index a1c9f1c05e..0a474cdb68 100644 --- a/lib/Target/Blackfin/BlackfinTargetMachine.cpp +++ b/lib/Target/Blackfin/BlackfinTargetMachine.cpp @@ -22,10 +22,10 @@ extern "C" void LLVMInitializeBlackfinTarget() { } BlackfinTargetMachine::BlackfinTargetMachine(const Target &T, - const std::string &TT, - const std::string &CPU, - const std::string &FS) - : LLVMTargetMachine(T, TT, CPU, FS), + StringRef TT, + StringRef CPU, + StringRef FS, Reloc::Model RM) + : LLVMTargetMachine(T, TT, CPU, FS, RM), DataLayout("e-p:32:32-i64:32-f64:32-n32"), Subtarget(TT, CPU, FS), TLInfo(*this), diff --git a/lib/Target/Blackfin/BlackfinTargetMachine.h b/lib/Target/Blackfin/BlackfinTargetMachine.h index bd7dc84f04..afe3919257 100644 --- a/lib/Target/Blackfin/BlackfinTargetMachine.h +++ b/lib/Target/Blackfin/BlackfinTargetMachine.h @@ -35,8 +35,8 @@ namespace llvm { BlackfinFrameLowering FrameLowering; BlackfinIntrinsicInfo IntrinsicInfo; public: - BlackfinTargetMachine(const Target &T, const std::string &TT, - const std::string &CPU, const std::string &FS); + BlackfinTargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, Reloc::Model RM); virtual const BlackfinInstrInfo *getInstrInfo() const { return &InstrInfo; } virtual const TargetFrameLowering *getFrameLowering() const { diff --git a/lib/Target/Blackfin/MCTargetDesc/BlackfinMCTargetDesc.cpp b/lib/Target/Blackfin/MCTargetDesc/BlackfinMCTargetDesc.cpp index 57fd7236c6..b4e89c1bbd 100644 --- a/lib/Target/Blackfin/MCTargetDesc/BlackfinMCTargetDesc.cpp +++ b/lib/Target/Blackfin/MCTargetDesc/BlackfinMCTargetDesc.cpp @@ -68,3 +68,14 @@ extern "C" void LLVMInitializeBlackfinMCSubtargetInfo() { extern "C" void LLVMInitializeBlackfinMCAsmInfo() { RegisterMCAsmInfo<BlackfinMCAsmInfo> X(TheBlackfinTarget); } + +MCCodeGenInfo *createBlackfinMCCodeGenInfo(StringRef TT, Reloc::Model RM) { + MCCodeGenInfo *X = new MCCodeGenInfo(); + X->InitMCCodeGenInfo(RM); + return X; +} + +extern "C" void LLVMInitializeBlackfinMCCodeGenInfo() { + TargetRegistry::RegisterMCCodeGenInfo(TheBlackfinTarget, + createBlackfinMCCodeGenInfo); +} diff --git a/lib/Target/CBackend/CBackend.cpp b/lib/Target/CBackend/CBackend.cpp index d6c278517b..4ff8f84891 100644 --- a/lib/Target/CBackend/CBackend.cpp +++ b/lib/Target/CBackend/CBackend.cpp @@ -71,6 +71,8 @@ extern "C" void LLVMInitializeCBackendMCInstrInfo() {} extern "C" void LLVMInitializeCBackendMCSubtargetInfo() {} +extern "C" void LLVMInitializeCBackendMCCodeGenInfo() {} + namespace { class CBEMCAsmInfo : public MCAsmInfo { public: diff --git a/lib/Target/CBackend/CTargetMachine.h b/lib/Target/CBackend/CTargetMachine.h index e64216be0b..e0af30de9a 100644 --- a/lib/Target/CBackend/CTargetMachine.h +++ b/lib/Target/CBackend/CTargetMachine.h @@ -20,8 +20,8 @@ namespace llvm { struct CTargetMachine : public TargetMachine { - CTargetMachine(const Target &T, const std::string &TT, - const std::string &CPU, const std::string &FS) + CTargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, Reloc::Model RM) : TargetMachine(T, TT, CPU, FS) {} virtual bool addPassesToEmitFile(PassManagerBase &PM, diff --git a/lib/Target/CellSPU/MCTargetDesc/SPUMCTargetDesc.cpp b/lib/Target/CellSPU/MCTargetDesc/SPUMCTargetDesc.cpp index 3c4147bc9f..a951f28219 100644 --- a/lib/Target/CellSPU/MCTargetDesc/SPUMCTargetDesc.cpp +++ b/lib/Target/CellSPU/MCTargetDesc/SPUMCTargetDesc.cpp @@ -77,3 +77,16 @@ static MCAsmInfo *createSPUMCAsmInfo(const Target &T, StringRef TT) { extern "C" void LLVMInitializeCellSPUMCAsmInfo() { RegisterMCAsmInfoFn X(TheCellSPUTarget, createSPUMCAsmInfo); } + +MCCodeGenInfo *createSPUMCCodeGenInfo(StringRef TT, Reloc::Model RM) { + MCCodeGenInfo *X = new MCCodeGenInfo(); + // For the time being, use static relocations, since there's really no + // support for PIC yet. + X->InitMCCodeGenInfo(Reloc::Static); + return X; +} + +extern "C" void LLVMInitializeCellSPUMCCodeGenInfo() { + TargetRegistry::RegisterMCCodeGenInfo(TheCellSPUTarget, + createSPUMCCodeGenInfo); +} diff --git a/lib/Target/CellSPU/SPUTargetMachine.cpp b/lib/Target/CellSPU/SPUTargetMachine.cpp index 3542a2b87e..8eabe9209d 100644 --- a/lib/Target/CellSPU/SPUTargetMachine.cpp +++ b/lib/Target/CellSPU/SPUTargetMachine.cpp @@ -31,9 +31,9 @@ SPUFrameLowering::getCalleeSaveSpillSlots(unsigned &NumEntries) const { return &LR[0]; } -SPUTargetMachine::SPUTargetMachine(const Target &T, const std::string &TT, - const std::string &CPU,const std::string &FS) - : LLVMTargetMachine(T, TT, CPU, FS), +SPUTargetMachine::SPUTargetMachine(const Target &T, StringRef TT, + StringRef CPU,StringRef FS, Reloc::Model RM) + : LLVMTargetMachine(T, TT, CPU, FS, RM), Subtarget(TT, CPU, FS), DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this), @@ -41,9 +41,6 @@ SPUTargetMachine::SPUTargetMachine(const Target &T, const std::string &TT, TLInfo(*this), TSInfo(*this), InstrItins(Subtarget.getInstrItineraryData()) { - // For the time being, use static relocations, since there's really no - // support for PIC yet. - setRelocationModel(Reloc::Static); } //===----------------------------------------------------------------------===// diff --git a/lib/Target/CellSPU/SPUTargetMachine.h b/lib/Target/CellSPU/SPUTargetMachine.h index d96f86dcae..b48a517f82 100644 --- a/lib/Target/CellSPU/SPUTargetMachine.h +++ b/lib/Target/CellSPU/SPUTargetMachine.h @@ -38,8 +38,8 @@ class SPUTargetMachine : public LLVMTargetMachine { SPUSelectionDAGInfo TSInfo; InstrItineraryData InstrItins; public: - SPUTargetMachine(const Target &T, const std::string &TT, - const std::string &CPU, const std::string &FS); + SPUTargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, Reloc::Model RM); /// Return the subtarget implementation object virtual const SPUSubtarget *getSubtargetImpl() const { diff --git a/lib/Target/CppBackend/CPPBackend.cpp b/lib/Target/CppBackend/CPPBackend.cpp index 98ec22c75b..ad33cfa319 100644 --- a/lib/Target/CppBackend/CPPBackend.cpp +++ b/lib/Target/CppBackend/CPPBackend.cpp @@ -85,6 +85,8 @@ extern "C" void LLVMInitializeCppBackendMCInstrInfo() {} extern "C" void LLVMInitializeCppBackendMCSubtargetInfo() {} +extern "C" void LLVMInitializeCppBackendMCCodeGenInfo() {} + namespace { typedef std::vector<Type*> TypeList; typedef std::map<Type*,std::string> TypeMap; diff --git a/lib/Target/CppBackend/CPPTargetMachine.h b/lib/Target/CppBackend/CPPTargetMachine.h index 7322e3e34f..56f479502d 100644 --- a/lib/Target/CppBackend/CPPTargetMachine.h +++ b/lib/Target/CppBackend/CPPTargetMachine.h @@ -22,8 +22,8 @@ namespace llvm { class formatted_raw_ostream; struct CPPTargetMachine : public TargetMachine { - CPPTargetMachine(const Target &T, const std::string &TT, - const std::string &CPU, const std::string &FS) + CPPTargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, Reloc::Model RM) : TargetMachine(T, TT, CPU, FS) {} virtual bool addPassesToEmitFile(PassManagerBase &PM, diff --git a/lib/Target/MBlaze/AsmParser/MBlazeAsmLexer.cpp b/lib/Target/MBlaze/AsmParser/MBlazeAsmLexer.cpp index 1596596445..ac8caa2677 100644 --- a/lib/Target/MBlaze/AsmParser/MBlazeAsmLexer.cpp +++ b/lib/Target/MBlaze/AsmParser/MBlazeAsmLexer.cpp @@ -19,7 +19,7 @@ #include "llvm/MC/MCParser/MCParsedAsmOperand.h" #include "llvm/Target/TargetAsmLexer.h" -#include "llvm/Target/TargetMachine.h" +#include "llvm/Target/TargetMachine.h" // FIXME #include "llvm/Target/TargetRegistry.h" #include <string> diff --git a/lib/Target/MBlaze/MBlazeTargetMachine.cpp b/lib/Target/MBlaze/MBlazeTargetMachine.cpp index 7208874aef..945c847ae9 100644 --- a/lib/Target/MBlaze/MBlazeTargetMachine.cpp +++ b/lib/Target/MBlaze/MBlazeTargetMachine.cpp @@ -67,19 +67,15 @@ extern "C" void LLVMInitializeMBlazeTarget() { // offset from the stack/frame pointer, using StackGrowsUp enables // an easier handling. MBlazeTargetMachine:: -MBlazeTargetMachine(const Target &T, const std::string &TT, - const std::string &CPU, const std::string &FS): - LLVMTargetMachine(T, TT, CPU, FS), +MBlazeTargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, Reloc::Model RM): + LLVMTargetMachine(T, TT, CPU, FS, RM), Subtarget(TT, CPU, FS), DataLayout("E-p:32:32:32-i8:8:8-i16:16:16"), InstrInfo(*this), FrameLowering(Subtarget), TLInfo(*this), TSInfo(*this), ELFWriterInfo(*this), InstrItins(Subtarget.getInstrItineraryData()) { - if (getRelocationModel() == Reloc::Default) { - setRelocationModel(Reloc::Static); - } - if (getCodeModel() == CodeModel::Default) setCodeModel(CodeModel::Small); } diff --git a/lib/Target/MBlaze/MBlazeTargetMachine.h b/lib/Target/MBlaze/MBlazeTargetMachine.h index cd6caafbf3..6f32d1439a 100644 --- a/lib/Target/MBlaze/MBlazeTargetMachine.h +++ b/lib/Target/MBlaze/MBlazeTargetMachine.h @@ -41,8 +41,8 @@ namespace llvm { InstrItineraryData InstrItins; public: - MBlazeTargetMachine(const Target &T, const std::string &TT, - const std::string &CPU, const std::string &FS); + MBlazeTargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, Reloc::Model RM); virtual const MBlazeInstrInfo *getInstrInfo() const { return &InstrInfo; } diff --git a/lib/Target/MBlaze/MCTargetDesc/MBlazeMCTargetDesc.cpp b/lib/Target/MBlaze/MCTargetDesc/MBlazeMCTargetDesc.cpp index 9fb7820846..22ce1cb8b6 100644 --- a/lib/Target/MBlaze/MCTargetDesc/MBlazeMCTargetDesc.cpp +++ b/lib/Target/MBlaze/MCTargetDesc/MBlazeMCTargetDesc.cpp @@ -74,3 +74,16 @@ static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) { extern "C" void LLVMInitializeMBlazeMCAsmInfo() { RegisterMCAsmInfoFn X(TheMBlazeTarget, createMCAsmInfo); } + +MCCodeGenInfo *createMBlazeMCCodeGenInfo(StringRef TT, Reloc::Model RM) { + MCCodeGenInfo *X = new MCCodeGenInfo(); + if (RM == Reloc::Default) + RM = Reloc::Static; + X->InitMCCodeGenInfo(RM); + return X; +} + +extern "C" void LLVMInitializeMBlazeMCCodeGenInfo() { + TargetRegistry::RegisterMCCodeGenInfo(TheMBlazeTarget, + createMBlazeMCCodeGenInfo); +} diff --git a/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp b/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp index 3a356744bc..6aa62206ef 100644 --- a/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp +++ b/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp @@ -66,3 +66,14 @@ extern "C" void LLVMInitializeMSP430MCSubtargetInfo() { extern "C" void LLVMInitializeMSP430MCAsmInfo() { RegisterMCAsmInfo<MSP430MCAsmInfo> X(TheMSP430Target); } + +MCCodeGenInfo *createMSP430MCCodeGenInfo(StringRef TT, Reloc::Model RM) { + MCCodeGenInfo *X = new MCCodeGenInfo(); + X->InitMCCodeGenInfo(RM); + return X; +} + +extern "C" void LLVMInitializeMSP430MCCodeGenInfo() { + TargetRegistry::RegisterMCCodeGenInfo(TheMSP430Target, + createMSP430MCCodeGenInfo); +} diff --git a/lib/Target/MSP430/MSP430TargetMachine.cpp b/lib/Target/MSP430/MSP430TargetMachine.cpp index 971f512141..85ca533005 100644 --- a/lib/Target/MSP430/MSP430TargetMachine.cpp +++ b/lib/Target/MSP430/MSP430TargetMachine.cpp @@ -25,10 +25,10 @@ extern "C" void LLVMInitializeMSP430Target() { } MSP430TargetMachine::MSP430TargetMachine(const Target &T, - const std::string &TT, - const std::string &CPU, - const std::string &FS) - : LLVMTargetMachine(T, TT, CPU, FS), + StringRef TT, + StringRef CPU, + StringRef FS, Reloc::Model RM) + : LLVMTargetMachine(T, TT, CPU, FS, RM), Subtarget(TT, CPU, FS), // FIXME: Check TargetData string. DataLayout("e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"), diff --git a/lib/Target/MSP430/MSP430TargetMachine.h b/lib/Target/MSP430/MSP430TargetMachine.h index 2a9eea0bcd..384176c1ed 100644 --- a/lib/Target/MSP430/MSP430TargetMachine.h +++ b/lib/Target/MSP430/MSP430TargetMachine.h @@ -38,8 +38,8 @@ class MSP430TargetMachine : public LLVMTargetMachine { MSP430FrameLowering FrameLowering; public: - MSP430TargetMachine(const Target &T, const std::string &TT, - const std::string &CPU, const std::string &FS); + MSP430TargetMachine(const Target &T, StringRef TT, + StringRef CPU, StringRef FS, Reloc::Model RM); virtual const TargetFrameLowering *getFrameLowering() const { return &FrameLowering; diff --git a/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp b/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp index 3a2ed8a762..b83a69d06a 100644 --- a/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp +++ b/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp @@ -77,3 +77,24 @@ extern "C" void LLVMInitializeMipsMCAsmInfo() { RegisterMCAsmInfoFn X(TheMipsTarget, createMipsMCAsmInfo); RegisterMCAsmInfoFn Y(TheMipselTarget, createMipsMCAsmInfo); } + +MCCodeGenInfo *createMipsMCCodeGenInfo(StringRef TT, Reloc::Model |