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-rw-r--r--lib/Target/ARM/Disassembler/ARMDisassembler.cpp12
-rw-r--r--lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp30
-rw-r--r--lib/Target/ARM/InstPrinter/ARMInstPrinter.h2
3 files changed, 23 insertions, 21 deletions
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index 6b86e41c45..685b921b4e 100644
--- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -47,7 +47,8 @@ public:
uint64_t &size,
const MemoryObject &region,
uint64_t address,
- raw_ostream &vStream) const;
+ raw_ostream &vStream,
+ raw_ostream &cStream) const;
/// getEDInfo - See MCDisassembler.
EDInstInfo *getEDInfo() const;
@@ -71,7 +72,8 @@ public:
uint64_t &size,
const MemoryObject &region,
uint64_t address,
- raw_ostream &vStream) const;
+ raw_ostream &vStream,
+ raw_ostream &cStream) const;
/// getEDInfo - See MCDisassembler.
EDInstInfo *getEDInfo() const;
@@ -328,7 +330,8 @@ EDInstInfo *ThumbDisassembler::getEDInfo() const {
DecodeStatus ARMDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
const MemoryObject &Region,
uint64_t Address,
- raw_ostream &os) const {
+ raw_ostream &os,
+ raw_ostream &cs) const {
uint8_t bytes[4];
assert(!(STI.getFeatureBits() & ARM::ModeThumb) &&
@@ -527,7 +530,8 @@ void ThumbDisassembler::UpdateThumbVFPPredicate(MCInst &MI) const {
DecodeStatus ThumbDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
const MemoryObject &Region,
uint64_t Address,
- raw_ostream &os) const {
+ raw_ostream &os,
+ raw_ostream &cs) const {
uint8_t bytes[4];
assert((STI.getFeatureBits() & ARM::ModeThumb) &&
diff --git a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
index 289d1921d1..0a0f1d07b5 100644
--- a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
+++ b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
@@ -51,7 +51,8 @@ void ARMInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
OS << getRegisterName(RegNo);
}
-void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
+void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
+ StringRef Annot) {
unsigned Opcode = MI->getOpcode();
// Check for MOVs and print canonical forms, instead.
@@ -71,9 +72,7 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
O << ", " << getRegisterName(MO2.getReg());
assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0);
-
- if (CommentStream) printAnnotations(MI, *CommentStream);
-
+ if (CommentStream) printAnnotation(*CommentStream, Annot);
return;
}
@@ -91,13 +90,12 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
<< ", " << getRegisterName(MO1.getReg());
if (ARM_AM::getSORegShOp(MO2.getImm()) == ARM_AM::rrx) {
- if (CommentStream) printAnnotations(MI, *CommentStream);
+ if (CommentStream) printAnnotation(*CommentStream, Annot);
return;
}
O << ", #" << translateShiftImm(ARM_AM::getSORegOffset(MO2.getImm()));
-
- if (CommentStream) printAnnotations(MI, *CommentStream);
+ if (CommentStream) printAnnotation(*CommentStream, Annot);
return;
}
@@ -111,7 +109,7 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
O << ".w";
O << '\t';
printRegisterList(MI, 4, O);
- if (CommentStream) printAnnotations(MI, *CommentStream);
+ if (CommentStream) printAnnotation(*CommentStream, Annot);
return;
}
if (Opcode == ARM::STR_PRE_IMM && MI->getOperand(2).getReg() == ARM::SP &&
@@ -119,7 +117,7 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
O << '\t' << "push";
printPredicateOperand(MI, 4, O);
O << "\t{" << getRegisterName(MI->getOperand(1).getReg()) << "}";
- if (CommentStream) printAnnotations(MI, *CommentStream);
+ if (CommentStream) printAnnotation(*CommentStream, Annot);
return;
}
@@ -132,7 +130,7 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
O << ".w";
O << '\t';
printRegisterList(MI, 4, O);
- if (CommentStream) printAnnotations(MI, *CommentStream);
+ if (CommentStream) printAnnotation(*CommentStream, Annot);
return;
}
if (Opcode == ARM::LDR_POST_IMM && MI->getOperand(2).getReg() == ARM::SP &&
@@ -140,7 +138,7 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
O << '\t' << "pop";
printPredicateOperand(MI, 5, O);
O << "\t{" << getRegisterName(MI->getOperand(0).getReg()) << "}";
- if (CommentStream) printAnnotations(MI, *CommentStream);
+ if (CommentStream) printAnnotation(*CommentStream, Annot);
return;
}
@@ -152,7 +150,7 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
printPredicateOperand(MI, 2, O);
O << '\t';
printRegisterList(MI, 4, O);
- if (CommentStream) printAnnotations(MI, *CommentStream);
+ if (CommentStream) printAnnotation(*CommentStream, Annot);
return;
}
@@ -163,7 +161,7 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
printPredicateOperand(MI, 2, O);
O << '\t';
printRegisterList(MI, 4, O);
- if (CommentStream) printAnnotations(MI, *CommentStream);
+ if (CommentStream) printAnnotation(*CommentStream, Annot);
return;
}
@@ -182,7 +180,7 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
if (Writeback) O << "!";
O << ", ";
printRegisterList(MI, 3, O);
- if (CommentStream) printAnnotations(MI, *CommentStream);
+ if (CommentStream) printAnnotation(*CommentStream, Annot);
return;
}
@@ -191,12 +189,12 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
MI->getOperand(1).getReg() == ARM::R8) {
O << "\tnop";
printPredicateOperand(MI, 2, O);
- if (CommentStream) printAnnotations(MI, *CommentStream);
+ if (CommentStream) printAnnotation(*CommentStream, Annot);
return;
}
printInstruction(MI, O);
- if (CommentStream) printAnnotations(MI, *CommentStream);
+ if (CommentStream) printAnnotation(*CommentStream, Annot);
}
void ARMInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
diff --git a/lib/Target/ARM/InstPrinter/ARMInstPrinter.h b/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
index fd4c9c46fa..a411e92f3b 100644
--- a/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
+++ b/lib/Target/ARM/InstPrinter/ARMInstPrinter.h
@@ -25,7 +25,7 @@ class ARMInstPrinter : public MCInstPrinter {
public:
ARMInstPrinter(const MCAsmInfo &MAI, const MCSubtargetInfo &STI);
- virtual void printInst(const MCInst *MI, raw_ostream &O);
+ virtual void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot);
virtual StringRef getOpcodeName(unsigned Opcode) const;
virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2025-04-26 09:07:51 +0000