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path: root/lib/Target/ARM/ARMConstantIslandPass.cpp
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Diffstat (limited to 'lib/Target/ARM/ARMConstantIslandPass.cpp')
-rw-r--r--lib/Target/ARM/ARMConstantIslandPass.cpp14
1 files changed, 14 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMConstantIslandPass.cpp b/lib/Target/ARM/ARMConstantIslandPass.cpp
index dd81796e8a..f8f717e4d4 100644
--- a/lib/Target/ARM/ARMConstantIslandPass.cpp
+++ b/lib/Target/ARM/ARMConstantIslandPass.cpp
@@ -1576,6 +1576,16 @@ bool ARMConstantIslands::OptimizeThumb2Instructions(MachineFunction &MF) {
Scale = 4;
}
break;
+ case ARM::t2LDRi12:
+ // FIXME: Temporary workaround for a bug introduced by r121082.
+ // We should use t2LDRpci for loads from constantpools.
+ if (isARMLowRegister(U.MI->getOperand(0).getReg()) &&
+ U.MI->getOperand(1).getReg() == ARM::PC) {
+ NewOpc = ARM::tLDRpci;
+ Bits = 8;
+ Scale = 4;
+ }
+ break;
}
if (!NewOpc)
@@ -1586,6 +1596,10 @@ bool ARMConstantIslands::OptimizeThumb2Instructions(MachineFunction &MF) {
// FIXME: Check if offset is multiple of scale if scale is not 4.
if (CPEIsInRange(U.MI, UserOffset, U.CPEMI, MaxOffs, false, true)) {
U.MI->setDesc(TII->get(NewOpc));
+ if (NewOpc == ARM::tLDRpci)
+ // FIXME: Temporary workaround.
+ // PC is now an implicit operand.
+ U.MI->RemoveOperand(1);
MachineBasicBlock *MBB = U.MI->getParent();
BBSizes[MBB->getNumber()] -= 2;
AdjustBBOffsetsAfter(MBB, -2);