diff options
Diffstat (limited to 'lib/CodeGen')
-rw-r--r-- | lib/CodeGen/SelectionDAG/ScheduleDAG.cpp | 2 | ||||
-rw-r--r-- | lib/CodeGen/SimpleRegisterCoalescing.cpp | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp index ce0707423e..f506b3ebfb 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp @@ -606,7 +606,7 @@ void ScheduleDAG::EmitSubregNode(SDNode *Node, SubIdx = cast<ConstantSDNode>(Node->getOperand(2))->getValue(); } - // TODO: Add tracking info to SSARegMap of which vregs are subregs + // TODO: Add tracking info to MachineRegisterInfo of which vregs are subregs // to allow coalescing in the allocator // If the node is only used by a CopyToReg and the dest reg is a vreg, use diff --git a/lib/CodeGen/SimpleRegisterCoalescing.cpp b/lib/CodeGen/SimpleRegisterCoalescing.cpp index da8b39fb2d..d48e1f9baf 100644 --- a/lib/CodeGen/SimpleRegisterCoalescing.cpp +++ b/lib/CodeGen/SimpleRegisterCoalescing.cpp @@ -1410,8 +1410,8 @@ bool SimpleRegisterCoalescing::runOnMachineFunction(MachineFunction &fn) { (*I)->eraseFromParent(); } - // Transfer sub-registers info to SSARegMap now that coalescing information - // is complete. + // Transfer sub-registers info to MachineRegisterInfo now that coalescing + // information is complete. RegSubIdxMap.grow(RegInfo.getLastVirtReg()+1); while (!SubRegIdxes.empty()) { std::pair<unsigned, unsigned> RI = SubRegIdxes.back(); |