aboutsummaryrefslogtreecommitdiff
path: root/lib/CodeGen
diff options
context:
space:
mode:
Diffstat (limited to 'lib/CodeGen')
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp9
1 files changed, 9 insertions, 0 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 766f846968..78f5623aed 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -562,6 +562,15 @@ void SelectionDAGLowering::visitBr(BranchInst &I) {
} else {
std::vector<SDOperand> Ops;
Ops.push_back(getRoot());
+ // If the false case is the current basic block, then this is a self
+ // loop. We do not want to emit "Loop: ... brcond Out; br Loop", as it
+ // adds an extra instruction in the loop. Instead, invert the
+ // condition and emit "Loop: ... br!cond Loop; br Out.
+ if (CurMBB == Succ1MBB) {
+ std::swap(Succ0MBB, Succ1MBB);
+ SDOperand True = DAG.getConstant(1, Cond.getValueType());
+ Cond = DAG.getNode(ISD::XOR, Cond.getValueType(), Cond, True);
+ }
Ops.push_back(Cond);
Ops.push_back(DAG.getBasicBlock(Succ0MBB));
Ops.push_back(DAG.getBasicBlock(Succ1MBB));