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path: root/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
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Diffstat (limited to 'lib/CodeGen/SelectionDAG/SelectionDAG.cpp')
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAG.cpp534
1 files changed, 260 insertions, 274 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 8d0d344d62..db73ab4650 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -40,13 +40,13 @@ using namespace llvm;
/// makeVTList - Return an instance of the SDVTList struct initialized with the
/// specified members.
-static SDVTList makeVTList(const MVT::ValueType *VTs, unsigned NumVTs) {
+static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) {
SDVTList Res = {VTs, NumVTs};
return Res;
}
-static const fltSemantics *MVTToAPFloatSemantics(MVT::ValueType VT) {
- switch (VT) {
+static const fltSemantics *MVTToAPFloatSemantics(MVT VT) {
+ switch (VT.getSimpleVT()) {
default: assert(0 && "Unknown FP format");
case MVT::f32: return &APFloat::IEEEsingle;
case MVT::f64: return &APFloat::IEEEdouble;
@@ -70,9 +70,9 @@ bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
return Value.bitwiseIsEqual(V);
}
-bool ConstantFPSDNode::isValueValidForType(MVT::ValueType VT,
+bool ConstantFPSDNode::isValueValidForType(MVT VT,
const APFloat& Val) {
- assert(MVT::isFloatingPoint(VT) && "Can only convert between FP types");
+ assert(VT.isFloatingPoint() && "Can only convert between FP types");
// PPC long double cannot be converted to any other type.
if (VT == MVT::ppcf128 ||
@@ -416,7 +416,7 @@ static void AddNodeIDNode(FoldingSetNodeID &ID, SDNode *N) {
LoadSDNode *LD = cast<LoadSDNode>(N);
ID.AddInteger(LD->getAddressingMode());
ID.AddInteger(LD->getExtensionType());
- ID.AddInteger((unsigned int)(LD->getMemoryVT()));
+ ID.AddInteger(LD->getMemoryVT().V);
ID.AddInteger(LD->getAlignment());
ID.AddInteger(LD->isVolatile());
break;
@@ -425,7 +425,7 @@ static void AddNodeIDNode(FoldingSetNodeID &ID, SDNode *N) {
StoreSDNode *ST = cast<StoreSDNode>(N);
ID.AddInteger(ST->getAddressingMode());
ID.AddInteger(ST->isTruncatingStore());
- ID.AddInteger((unsigned int)(ST->getMemoryVT()));
+ ID.AddInteger(ST->getMemoryVT().V);
ID.AddInteger(ST->getAlignment());
ID.AddInteger(ST->isVolatile());
break;
@@ -574,12 +574,12 @@ void SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
TargetExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
break;
case ISD::VALUETYPE: {
- MVT::ValueType VT = cast<VTSDNode>(N)->getVT();
- if (MVT::isExtendedVT(VT)) {
+ MVT VT = cast<VTSDNode>(N)->getVT();
+ if (VT.isExtended()) {
Erased = ExtendedValueTypeNodes.erase(VT);
} else {
- Erased = ValueTypeNodes[VT] != 0;
- ValueTypeNodes[VT] = 0;
+ Erased = ValueTypeNodes[VT.getSimpleVT()] != 0;
+ ValueTypeNodes[VT.getSimpleVT()] = 0;
}
break;
}
@@ -684,13 +684,13 @@ SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(N)) {
ID.AddInteger(LD->getAddressingMode());
ID.AddInteger(LD->getExtensionType());
- ID.AddInteger((unsigned int)(LD->getMemoryVT()));
+ ID.AddInteger(LD->getMemoryVT().V);
ID.AddInteger(LD->getAlignment());
ID.AddInteger(LD->isVolatile());
} else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) {
ID.AddInteger(ST->getAddressingMode());
ID.AddInteger(ST->isTruncatingStore());
- ID.AddInteger((unsigned int)(ST->getMemoryVT()));
+ ID.AddInteger(ST->getMemoryVT().V);
ID.AddInteger(ST->getAlignment());
ID.AddInteger(ST->isVolatile());
}
@@ -712,10 +712,10 @@ SelectionDAG::~SelectionDAG() {
}
}
-SDOperand SelectionDAG::getZeroExtendInReg(SDOperand Op, MVT::ValueType VT) {
+SDOperand SelectionDAG::getZeroExtendInReg(SDOperand Op, MVT VT) {
if (Op.getValueType() == VT) return Op;
APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(),
- MVT::getSizeInBits(VT));
+ VT.getSizeInBits());
return getNode(ISD::AND, Op.getValueType(), Op,
getConstant(Imm, Op.getValueType()));
}
@@ -729,20 +729,20 @@ SDOperand SelectionDAG::getString(const std::string &Val) {
return SDOperand(N, 0);
}
-SDOperand SelectionDAG::getConstant(uint64_t Val, MVT::ValueType VT, bool isT) {
- MVT::ValueType EltVT =
- MVT::isVector(VT) ? MVT::getVectorElementType(VT) : VT;
+SDOperand SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) {
+ MVT EltVT =
+ VT.isVector() ? VT.getVectorElementType() : VT;
- return getConstant(APInt(MVT::getSizeInBits(EltVT), Val), VT, isT);
+ return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
}
-SDOperand SelectionDAG::getConstant(const APInt &Val, MVT::ValueType VT, bool isT) {
- assert(MVT::isInteger(VT) && "Cannot create FP integer constant!");
+SDOperand SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) {
+ assert(VT.isInteger() && "Cannot create FP integer constant!");
- MVT::ValueType EltVT =
- MVT::isVector(VT) ? MVT::getVectorElementType(VT) : VT;
+ MVT EltVT =
+ VT.isVector() ? VT.getVectorElementType() : VT;
- assert(Val.getBitWidth() == MVT::getSizeInBits(EltVT) &&
+ assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
"APInt size does not match type size!");
unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
@@ -752,7 +752,7 @@ SDOperand SelectionDAG::getConstant(const APInt &Val, MVT::ValueType VT, bool is
void *IP = 0;
SDNode *N = NULL;
if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
- if (!MVT::isVector(VT))
+ if (!VT.isVector())
return SDOperand(N, 0);
if (!N) {
N = new ConstantSDNode(isT, Val, EltVT);
@@ -761,9 +761,9 @@ SDOperand SelectionDAG::getConstant(const APInt &Val, MVT::ValueType VT, bool is
}
SDOperand Result(N, 0);
- if (MVT::isVector(VT)) {
+ if (VT.isVector()) {
SmallVector<SDOperand, 8> Ops;
- Ops.assign(MVT::getVectorNumElements(VT), Result);
+ Ops.assign(VT.getVectorNumElements(), Result);
Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
}
return Result;
@@ -774,12 +774,11 @@ SDOperand SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
}
-SDOperand SelectionDAG::getConstantFP(const APFloat& V, MVT::ValueType VT,
- bool isTarget) {
- assert(MVT::isFloatingPoint(VT) && "Cannot create integer FP constant!");
+SDOperand SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) {
+ assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
- MVT::ValueType EltVT =
- MVT::isVector(VT) ? MVT::getVectorElementType(VT) : VT;
+ MVT EltVT =
+ VT.isVector() ? VT.getVectorElementType() : VT;
// Do the map lookup using the actual bit pattern for the floating point
// value, so that we don't have problems with 0.0 comparing equal to -0.0, and
@@ -791,7 +790,7 @@ SDOperand SelectionDAG::getConstantFP(const APFloat& V, MVT::ValueType VT,
void *IP = 0;
SDNode *N = NULL;
if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
- if (!MVT::isVector(VT))
+ if (!VT.isVector())
return SDOperand(N, 0);
if (!N) {
N = new ConstantFPSDNode(isTarget, V, EltVT);
@@ -800,18 +799,17 @@ SDOperand SelectionDAG::getConstantFP(const APFloat& V, MVT::ValueType VT,
}
SDOperand Result(N, 0);
- if (MVT::isVector(VT)) {
+ if (VT.isVector()) {
SmallVector<SDOperand, 8> Ops;
- Ops.assign(MVT::getVectorNumElements(VT), Result);
+ Ops.assign(VT.getVectorNumElements(), Result);
Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
}
return Result;
}
-SDOperand SelectionDAG::getConstantFP(double Val, MVT::ValueType VT,
- bool isTarget) {
- MVT::ValueType EltVT =
- MVT::isVector(VT) ? MVT::getVectorElementType(VT) : VT;
+SDOperand SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) {
+ MVT EltVT =
+ VT.isVector() ? VT.getVectorElementType() : VT;
if (EltVT==MVT::f32)
return getConstantFP(APFloat((float)Val), VT, isTarget);
else
@@ -819,7 +817,7 @@ SDOperand SelectionDAG::getConstantFP(double Val, MVT::ValueType VT,
}
SDOperand SelectionDAG::getGlobalAddress(const GlobalValue *GV,
- MVT::ValueType VT, int Offset,
+ MVT VT, int Offset,
bool isTargetGA) {
unsigned Opc;
@@ -848,8 +846,7 @@ SDOperand SelectionDAG::getGlobalAddress(const GlobalValue *GV,
return SDOperand(N, 0);
}
-SDOperand SelectionDAG::getFrameIndex(int FI, MVT::ValueType VT,
- bool isTarget) {
+SDOperand SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) {
unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
FoldingSetNodeID ID;
AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0);
@@ -863,7 +860,7 @@ SDOperand SelectionDAG::getFrameIndex(int FI, MVT::ValueType VT,
return SDOperand(N, 0);
}
-SDOperand SelectionDAG::getJumpTable(int JTI, MVT::ValueType VT, bool isTarget){
+SDOperand SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){
unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
FoldingSetNodeID ID;
AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0);
@@ -877,7 +874,7 @@ SDOperand SelectionDAG::getJumpTable(int JTI, MVT::ValueType VT, bool isTarget){
return SDOperand(N, 0);
}
-SDOperand SelectionDAG::getConstantPool(Constant *C, MVT::ValueType VT,
+SDOperand SelectionDAG::getConstantPool(Constant *C, MVT VT,
unsigned Alignment, int Offset,
bool isTarget) {
unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
@@ -896,8 +893,7 @@ SDOperand SelectionDAG::getConstantPool(Constant *C, MVT::ValueType VT,
}
-SDOperand SelectionDAG::getConstantPool(MachineConstantPoolValue *C,
- MVT::ValueType VT,
+SDOperand SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT,
unsigned Alignment, int Offset,
bool isTarget) {
unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
@@ -942,12 +938,12 @@ SDOperand SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) {
return SDOperand(N, 0);
}
-SDOperand SelectionDAG::getValueType(MVT::ValueType VT) {
- if (!MVT::isExtendedVT(VT) && (unsigned)VT >= ValueTypeNodes.size())
- ValueTypeNodes.resize(VT+1);
+SDOperand SelectionDAG::getValueType(MVT VT) {
+ if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size())
+ ValueTypeNodes.resize(VT.getSimpleVT()+1);
- SDNode *&N = MVT::isExtendedVT(VT) ?
- ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT];
+ SDNode *&N = VT.isExtended() ?
+ ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()];
if (N) return SDOperand(N, 0);
N = new VTSDNode(VT);
@@ -955,7 +951,7 @@ SDOperand SelectionDAG::getValueType(MVT::ValueType VT) {
return SDOperand(N, 0);
}
-SDOperand SelectionDAG::getExternalSymbol(const char *Sym, MVT::ValueType VT) {
+SDOperand SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) {
SDNode *&N = ExternalSymbols[Sym];
if (N) return SDOperand(N, 0);
N = new ExternalSymbolSDNode(false, Sym, VT);
@@ -963,8 +959,7 @@ SDOperand SelectionDAG::getExternalSymbol(const char *Sym, MVT::ValueType VT) {
return SDOperand(N, 0);
}
-SDOperand SelectionDAG::getTargetExternalSymbol(const char *Sym,
- MVT::ValueType VT) {
+SDOperand SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) {
SDNode *&N = TargetExternalSymbols[Sym];
if (N) return SDOperand(N, 0);
N = new ExternalSymbolSDNode(true, Sym, VT);
@@ -975,7 +970,7 @@ SDOperand SelectionDAG::getTargetExternalSymbol(const char *Sym,
SDOperand SelectionDAG::getCondCode(ISD::CondCode Cond) {
if ((unsigned)Cond >= CondCodeNodes.size())
CondCodeNodes.resize(Cond+1);
-
+
if (CondCodeNodes[Cond] == 0) {
CondCodeNodes[Cond] = new CondCodeSDNode(Cond);
AllNodes.push_back(CondCodeNodes[Cond]);
@@ -983,7 +978,7 @@ SDOperand SelectionDAG::getCondCode(ISD::CondCode Cond) {
return SDOperand(CondCodeNodes[Cond], 0);
}
-SDOperand SelectionDAG::getRegister(unsigned RegNo, MVT::ValueType VT) {
+SDOperand SelectionDAG::getRegister(unsigned RegNo, MVT VT) {
FoldingSetNodeID ID;
AddNodeIDNode(ID, ISD::Register, getVTList(VT), (SDOperand*)0, 0);
ID.AddInteger(RegNo);
@@ -1039,17 +1034,17 @@ SDOperand SelectionDAG::getMemOperand(const MachineMemOperand &MO) {
/// CreateStackTemporary - Create a stack temporary, suitable for holding the
/// specified value type.
-SDOperand SelectionDAG::CreateStackTemporary(MVT::ValueType VT) {
+SDOperand SelectionDAG::CreateStackTemporary(MVT VT) {
MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
- unsigned ByteSize = MVT::getSizeInBits(VT)/8;
- const Type *Ty = MVT::getTypeForValueType(VT);
+ unsigned ByteSize = VT.getSizeInBits()/8;
+ const Type *Ty = VT.getTypeForMVT();
unsigned StackAlign = (unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty);
int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign);
return getFrameIndex(FrameIdx, TLI.getPointerTy());
}
-SDOperand SelectionDAG::FoldSetCC(MVT::ValueType VT, SDOperand N1,
+SDOperand SelectionDAG::FoldSetCC(MVT VT, SDOperand N1,
SDOperand N2, ISD::CondCode Cond) {
// These setcc operations always fold.
switch (Cond) {
@@ -1069,7 +1064,7 @@ SDOperand SelectionDAG::FoldSetCC(MVT::ValueType VT, SDOperand N1,
case ISD::SETUO:
case ISD::SETUEQ:
case ISD::SETUNE:
- assert(!MVT::isInteger(N1.getValueType()) && "Illegal setcc for integer!");
+ assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
break;
}
@@ -1177,7 +1172,7 @@ void SelectionDAG::ComputeMaskedBits(SDOperand Op, const APInt &Mask,
APInt &KnownZero, APInt &KnownOne,
unsigned Depth) const {
unsigned BitWidth = Mask.getBitWidth();
- assert(BitWidth == MVT::getSizeInBits(Op.getValueType()) &&
+ assert(BitWidth == Op.getValueType().getSizeInBits() &&
"Mask size mismatches value type size!");
KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
@@ -1372,8 +1367,8 @@ void SelectionDAG::ComputeMaskedBits(SDOperand Op, const APInt &Mask,
}
return;
case ISD::SIGN_EXTEND_INREG: {
- MVT::ValueType EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
- unsigned EBits = MVT::getSizeInBits(EVT);
+ MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
+ unsigned EBits = EVT.getSizeInBits();
// Sign extension. Compute the demanded bits in the result that are not
// present in the input.
@@ -1417,15 +1412,15 @@ void SelectionDAG::ComputeMaskedBits(SDOperand Op, const APInt &Mask,
case ISD::LOAD: {
if (ISD::isZEXTLoad(Op.Val)) {
LoadSDNode *LD = cast<LoadSDNode>(Op);
- MVT::ValueType VT = LD->getMemoryVT();
- unsigned MemBits = MVT::getSizeInBits(VT);
+ MVT VT = LD->getMemoryVT();
+ unsigned MemBits = VT.getSizeInBits();
KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
}
return;
}
case ISD::ZERO_EXTEND: {
- MVT::ValueType InVT = Op.getOperand(0).getValueType();
- unsigned InBits = MVT::getSizeInBits(InVT);
+ MVT InVT = Op.getOperand(0).getValueType();
+ unsigned InBits = InVT.getSizeInBits();
APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
APInt InMask = Mask;
InMask.trunc(InBits);
@@ -1438,8 +1433,8 @@ void SelectionDAG::ComputeMaskedBits(SDOperand Op, const APInt &Mask,
return;
}
case ISD::SIGN_EXTEND: {
- MVT::ValueType InVT = Op.getOperand(0).getValueType();
- unsigned InBits = MVT::getSizeInBits(InVT);
+ MVT InVT = Op.getOperand(0).getValueType();
+ unsigned InBits = InVT.getSizeInBits();
APInt InSignBit = APInt::getSignBit(InBits);
APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
APInt InMask = Mask;
@@ -1479,8 +1474,8 @@ void SelectionDAG::ComputeMaskedBits(SDOperand Op, const APInt &Mask,
return;
}
case ISD::ANY_EXTEND: {
- MVT::ValueType InVT = Op.getOperand(0).getValueType();
- unsigned InBits = MVT::getSizeInBits(InVT);
+ MVT InVT = Op.getOperand(0).getValueType();
+ unsigned InBits = InVT.getSizeInBits();
APInt InMask = Mask;
InMask.trunc(InBits);
KnownZero.trunc(InBits);
@@ -1491,8 +1486,8 @@ void SelectionDAG::ComputeMaskedBits(SDOperand Op, const APInt &Mask,
return;
}
case ISD::TRUNCATE: {
- MVT::ValueType InVT = Op.getOperand(0).getValueType();
- unsigned InBits = MVT::getSizeInBits(InVT);
+ MVT InVT = Op.getOperand(0).getValueType();
+ unsigned InBits = InVT.getSizeInBits();
APInt InMask = Mask;
InMask.zext(InBits);
KnownZero.zext(InBits);
@@ -1504,8 +1499,8 @@ void SelectionDAG::ComputeMaskedBits(SDOperand Op, const APInt &Mask,
break;
}
case ISD::AssertZext: {
- MVT::ValueType VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
- APInt InMask = APInt::getLowBitsSet(BitWidth, MVT::getSizeInBits(VT));
+ MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
+ APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
KnownOne, Depth+1);
KnownZero |= (~InMask) & Mask;
@@ -1624,9 +1619,9 @@ void SelectionDAG::ComputeMaskedBits(SDOperand Op, const APInt &Mask,
/// information. For example, immediately after an "SRA X, 2", we know that
/// the top 3 bits are all equal to each other, so we return 3.
unsigned SelectionDAG::ComputeNumSignBits(SDOperand Op, unsigned Depth) const{
- MVT::ValueType VT = Op.getValueType();
- assert(MVT::isInteger(VT) && "Invalid VT!");
- unsigned VTBits = MVT::getSizeInBits(VT);
+ MVT VT = Op.getValueType();
+ assert(VT.isInteger() && "Invalid VT!");
+ unsigned VTBits = VT.getSizeInBits();
unsigned Tmp, Tmp2;
unsigned FirstAnswer = 1;
@@ -1636,10 +1631,10 @@ unsigned SelectionDAG::ComputeNumSignBits(SDOperand Op, unsigned Depth) const{
switch (Op.getOpcode()) {
default: break;
case ISD::AssertSext:
- Tmp = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(1))->getVT());
+ Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
return VTBits-Tmp+1;
case ISD::AssertZext:
- Tmp = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(1))->getVT());
+ Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
return VTBits-Tmp;
case ISD::Constant: {
@@ -1653,12 +1648,12 @@ unsigned SelectionDAG::ComputeNumSignBits(SDOperand Op, unsigned Depth) const{
}
case ISD::SIGN_EXTEND:
- Tmp = VTBits-MVT::getSizeInBits(Op.getOperand(0).getValueType());
+ Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits();
return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
case ISD::SIGN_EXTEND_INREG:
// Max of the input and what this extends.
- Tmp = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(1))->getVT());
+ Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
Tmp = VTBits-Tmp+1;
Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
@@ -1793,10 +1788,10 @@ unsigned SelectionDAG::ComputeNumSignBits(SDOperand Op, unsigned Depth) const{
switch (ExtType) {
default: break;
case ISD::SEXTLOAD: // '17' bits known
- Tmp = MVT::getSizeInBits(LD->getMemoryVT());
+ Tmp = LD->getMemoryVT().getSizeInBits();
return VTBits-Tmp+1;
case ISD::ZEXTLOAD: // '16' bits known
- Tmp = MVT::getSizeInBits(LD->getMemoryVT());
+ Tmp = LD->getMemoryVT().getSizeInBits();
return VTBits-Tmp;
}
}
@@ -1848,7 +1843,7 @@ bool SelectionDAG::isVerifiedDebugInfoDesc(SDOperand Op) const {
/// getShuffleScalarElt - Returns the scalar element that will make up the ith
/// element of the result of the vector shuffle.
SDOperand SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned Idx) {
- MVT::ValueType VT = N->getValueType(0);
+ MVT VT = N->getValueType(0);
SDOperand PermMask = N->getOperand(2);
unsigned NumElems = PermMask.getNumOperands();
SDOperand V = (Idx < NumElems) ? N->getOperand(0) : N->getOperand(1);
@@ -1856,18 +1851,18 @@ SDOperand SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned Idx) {
if (V.getOpcode() == ISD::BIT_CONVERT) {
V = V.getOperand(0);
- if (MVT::getVectorNumElements(V.getValueType()) != NumElems)
+ if (V.getValueType().getVectorNumElements() != NumElems)
return SDOperand();
}
if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
return (Idx == 0) ? V.getOperand(0)
- : getNode(ISD::UNDEF, MVT::getVectorElementType(VT));
+ : getNode(ISD::UNDEF, VT.getVectorElementType());
if (V.getOpcode() == ISD::BUILD_VECTOR)
return V.getOperand(Idx);
if (V.getOpcode() == ISD::VECTOR_SHUFFLE) {
SDOperand Elt = PermMask.getOperand(Idx);
if (Elt.getOpcode() == ISD::UNDEF)
- return getNode(ISD::UNDEF, MVT::getVectorElementType(VT));
+ return getNode(ISD::UNDEF, VT.getVectorElementType());
return getShuffleScalarElt(V.Val,cast<ConstantSDNode>(Elt)->getValue());
}
return SDOperand();
@@ -1876,7 +1871,7 @@ SDOperand SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned Idx) {
/// getNode - Gets or creates the specified node.
///
-SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT) {
+SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT) {
FoldingSetNodeID ID;
AddNodeIDNode(ID, Opcode, getVTList(VT), (SDOperand*)0, 0);
void *IP = 0;
@@ -1889,12 +1884,11 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT) {
return SDOperand(N, 0);
}
-SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
- SDOperand Operand) {
+SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT, SDOperand Operand) {
// Constant fold unary operations with an integer constant operand.
if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.Val)) {
const APInt &Val = C->getAPIntValue();
- unsigned BitWidth = MVT::getSizeInBits(VT);
+ unsigned BitWidth = VT.getSizeInBits();
switch (Opcode) {
default: break;
case ISD::SIGN_EXTEND:
@@ -1979,56 +1973,56 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
return Operand; // Factor or merge of one node? No need.
case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node");
case ISD::FP_EXTEND:
- assert(MVT::isFloatingPoint(VT) &&
- MVT::isFloatingPoint(Operand.getValueType()) && "Invalid FP cast!");
+ assert(VT.isFloatingPoint() &&
+ Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
if (Operand.getValueType() == VT) return Operand; // noop conversion.
if (Operand.getOpcode() == ISD::UNDEF)
return getNode(ISD::UNDEF, VT);
break;
case ISD::SIGN_EXTEND:
- assert(MVT::isInteger(VT) && MVT::isInteger(Operand.getValueType()) &&
+ assert(VT.isInteger() && Operand.getValueType().isInteger() &&
"Invalid SIGN_EXTEND!");
if (Operand.getValueType() == VT) return Operand; // noop extension
- assert(MVT::getSizeInBits(Operand.getValueType()) < MVT::getSizeInBits(VT)
+ assert(Operand.getValueType().getSizeInBits() < VT.getSizeInBits()
&& "Invalid sext node, dst < src!");
if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
return getNode(OpOpcode, VT, Operand.Val->getOperand(0));
break;
case ISD::ZERO_EXTEND:
- assert(MVT::isInteger(VT) && MVT::isInteger(Operand.getValueType()) &&
+ assert(VT.isInteger() && Operand.getValueType().isInteger() &&
"Invalid ZERO_EXTEND!");
if (Operand.getValueType() == VT) return Operand; // noop extension
- assert(MVT::getSizeInBits(Operand.getValueType()) < MVT::getSizeInBits(VT)
+ assert(Operand.getValueType().getSizeInBits() < VT.getSizeInBits()
&& "Invalid zext node, dst < src!");
if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
return getNode(ISD::ZERO_EXTEND, VT, Operand.Val->getOperand(0));
break;
case ISD::ANY_EXTEND:
- assert(MVT::isInteger(VT) && MVT::isInteger(Operand.getValueType()) &&
+ assert(VT.isInteger() && Operand.getValueType().isInteger() &&
"Invalid ANY_EXTEND!");
if (Operand.getValueType() == VT) return Operand; // noop extension
- assert(MVT::getSizeInBits(Operand.getValueType()) < MVT::getSizeInBits(VT)
+ assert(Operand.getValueType().getSizeInBits() < VT.getSizeInBits()
&& "Invalid anyext node, dst < src!");
if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
// (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
return getNode(OpOpcode, VT, Operand.Val->getOperand(0));
break;
case ISD::TRUNCATE:
- assert(MVT::isInteger(VT) && MVT::isInteger(Operand.getValueType()) &&
+ assert(VT.isInteger() && Operand.getValueType().isInteger() &&
"Invalid TRUNCATE!");
if (Operand.getValueType() == VT) return Operand; // noop truncate
- assert(MVT::getSizeInBits(Operand.getValueType()) > MVT::getSizeInBits(VT)
+ assert(Operand.getValueType().getSizeInBits() > VT.getSizeInBits()
&& "Invalid truncate node, src < dst!");
if (OpOpcode == ISD::TRUNCATE)
return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0));
else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
OpOpcode == ISD::ANY_EXTEND) {
// If the source is smaller than the dest, we still need an extend.
- if (MVT::getSizeInBits(Operand.Val->getOperand(0).getValueType())
- < MVT::getSizeInBits(VT))
+ if (Operand.Val->getOperand(0).getValueType().getSizeInBits()
+ < VT.getSizeInBits())
return getNode(OpOpcode, VT, Operand.Val->getOperand(0));
- else if (MVT::getSizeInBits(Operand.Val->getOperand(0).getValueType())
- > MVT::getSizeInBits(VT))
+ else if (Operand.Val->getOperand(0).getValueType().getSizeInBits()
+ > VT.getSizeInBits())
return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0));
else
return Operand.Val->getOperand(0);
@@ -2036,7 +2030,7 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
break;
case ISD::BIT_CONVERT:
// Basic sanity checking.
- assert(MVT::getSizeInBits(VT) == MVT::getSizeInBits(Operand.getValueType())
+ assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
&& "Cannot BIT_CONVERT between types of different sizes!");
if (VT == Operand.getValueType()) return Operand; // noop conversion.
if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
@@ -2045,8 +2039,8 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
return getNode(ISD::UNDEF, VT);
break;
case ISD::SCALAR_TO_VECTOR:
- assert(MVT::isVector(VT) && !MVT::isVector(Operand.getValueType()) &&
- MVT::getVectorElementType(VT) == Operand.getValueType() &&
+ assert(VT.isVector() && !Operand.getValueType().isVector() &&
+ VT.getVectorElementType() == Operand.getValueType() &&
"Illegal SCALAR_TO_VECTOR node!");
if (OpOpcode == ISD::UNDEF)
return getNode(ISD::UNDEF, VT);
@@ -2090,7 +2084,7 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
-SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
+SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT,
SDOperand N1, SDOperand N2) {
ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val);
@@ -2104,7 +2098,7 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
if (N2.getOpcode() == ISD::EntryToken) return N1;
break;
case ISD::AND:
- assert(MVT::isInteger(VT) && N1.getValueType() == N2.getValueType() &&
+ assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
N1.getValueType() == VT && "Binary operator types must match!");
// (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
// worth handling here.
@@ -2117,7 +2111,7 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
case ISD::XOR:
case ISD::ADD:
case ISD::SUB:
- assert(MVT::isInteger(VT) && N1.getValueType() == N2.getValueType() &&
+ assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
N1.getValueType() == VT && "Binary operator types must match!");
// (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
// it's worth handling here.
@@ -2128,7 +2122,7 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
case ISD::UREM:
case ISD::MULHU:
case ISD::MULHS:
- assert(MVT::isInteger(VT) && "This operator does not apply to FP types!");
+ assert(VT.isInteger() && "This operator does not apply to FP types!");
// fall through
case ISD::MUL:
case ISD::SDIV:
@@ -2143,8 +2137,8 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
break;
case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
assert(N1.getValueType() == VT &&
- MVT::isFloatingPoint(N1.getValueType()) &&
- MVT::isFloatingPoint(N2.getValueType()) &&
+ N1.getValueType().isFloatingPoint() &&
+ N2.getValueType().isFloatingPoint() &&
"Invalid FCOPYSIGN!");
break;
case ISD::SHL:
@@ -2154,49 +2148,49 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
case ISD::ROTR:
assert(VT == N1.getValueType() &&
"Shift operators return type must be the same as their first arg");
- assert(MVT::isInteger(VT) && MVT::isInteger(N2.getValueType()) &&
+ assert(VT.isInteger() && N2.getValueType().isInteger() &&
VT != MVT::i1 && "Shifts only work on integers");
break;
case ISD::FP_ROUND_INREG: {
- MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT();
+ MVT EVT = cast<VTSDNode>(N2)->getVT();
assert(VT == N1.getValueType() && "Not an inreg round!");
- assert(MVT::isFloatingPoint(VT) && MVT::isFloatingPoint(EVT) &&
+ assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
"Cannot FP_ROUND_INREG integer types");
- assert(MVT::getSizeInBits(EVT) <= MVT::getSizeInBits(VT) &&
+ assert(EVT.getSizeInBits() <= VT.getSizeInBits() &&
"Not rounding down!");
if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
break;
}
case ISD::FP_ROUND:
- assert(MVT::isFloatingPoint(VT) &&
- MVT::isFloatingPoint(N1.getValueType()) &&
- MVT::getSizeInBits(VT) <= MVT::getSizeInBits(N1.getValueType()) &&
+ assert(VT.isFloatingPoint() &&
+ N1.getValueType().isFloatingPoint() &&
+ VT.getSizeInBits() <= N1.getValueType().getSizeInBits() &&
isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
if (N1.getValueType() == VT) return N1; // noop conversion.
break;
case ISD::AssertSext:
case ISD::AssertZext: {
- MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT();
+ MVT EVT = cast<VTSDNode>(N2)->getVT();
assert(VT == N1.getValueType() && "Not an inreg extend!");
- assert(MVT::isInteger(VT) && MVT::isInteger(EVT) &&
+ assert(VT.isInteger() && EVT.isInteger() &&
"Cannot *_EXTEND_INREG FP types");
- assert(MVT::getSizeInBits(EVT) <= MVT::getSizeInBits(VT) &&
+ assert(EVT.getSizeInBits() <= VT.getSizeInBits() &&
"Not extending!");
if (VT == EVT) return N1; // noop assertion.
break;
}
case ISD::SIGN_EXTEND_INREG: {
- MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT();
+ MVT EVT = cast<VTSDNode>(N2)->getVT();
assert(VT == N1.getValueType() && "Not an inreg extend!");
- assert(MVT::isInteger(VT) && MVT::isInteger(EVT) &&
+ assert(VT.isInteger() && EVT.isInteger() &&
"Cannot *_EXTEND_INREG FP types");
- assert(MVT::getSizeInBits(EVT) <= MVT::getSizeInBits(VT) &&
+ assert(EVT.getSizeInBits() <= VT.getSizeInBits() &&
"Not extending!");
if (EVT == VT) return N1; // Not actually extending
if (N1C) {
APInt Val = N1C->getAPIntValue();
- unsigned FromBits = MVT::getSizeInBits(cast<VTSDNode>(N2)->getVT());
+ unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits();
Val <<= Val.getBitWidth()-FromBits;
Val = Val.ashr(Val.getBitWidth()-FromBits);
return getConstant(Val, VT);
@@ -2215,7 +2209,7 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
if (N1.getOpcode() == ISD::CONCAT_VECTORS &&
N1.getNumOperands() > 0) {
unsigned Factor =
- MVT::getVectorNumElements(N1.getOperand(0).getValueType());
+ N1.getOperand(0).getValueType().getVectorNumElements();
return getNode(ISD::EXTRACT_VECTOR_ELT, VT,
N1.getOperand(N2C->getValue() / Factor),
getConstant(N2C->getValue() % Factor, N2.getValueType()));
@@ -2238,9 +2232,9 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
break;
case ISD::EXTRACT_ELEMENT:
assert(N2C && (unsigned)N2C->getValue() < 2 && "Bad EXTRACT_ELEMENT!");
- assert(!MVT::isVector(N1.getValueType()) &&
- MVT::isInteger(N1.getValueType()) &&
- !MVT::isVector(VT) && MVT::isInteger(VT) &&
+ assert(!N1.getValueType().isVector() &&
+ N1.getValueType().isInteger() &&
+ !VT.isVector() && VT.isInteger() &&
"EXTRACT_ELEMENT only applies to integers!");
// EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
@@ -2251,7 +2245,7 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
// EXTRACT_ELEMENT of a constant int is also very common.
if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
- unsigned ElementSize = MVT::getSizeInBits(VT);
+ unsigned ElementSize = VT.getSizeInBits();
unsigned Shift = ElementSize * N2C->getValue();
APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
return getConstant(ShiftedVal.trunc(ElementSize), VT);
@@ -2365,7 +2359,7 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
case ISD::SREM:
case ISD::SRL:
case ISD::SHL:
- if (!MVT::isVector(VT))
+ if (!VT.isVector())
return getConstant(0, VT); // fold op(undef, arg2) -> 0
// For vectors, we can't easily build an all zero vector, just return
// the LHS.
@@ -2401,14 +2395,14 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
case ISD::AND:
case ISD::SRL:
case ISD::SHL:
- if (!MVT::isVector(VT))
+ if (!VT.isVector())
return getConstant(0, VT); // fold op(arg1, undef) -> 0
// For vectors, we can't easily build an all zero vector, just return
// the LHS.
return N1;
case ISD::OR:
- if (!MVT::isVector(VT))
- return getConstant(MVT::getIntVTBitMask(VT), VT);
+ if (!VT.isVector())
+ return getConstant(VT.getIntegerVTBitMask(), VT);
// For vectors, we can't easily build an all one vector, just return
// the LHS.
return N1;
@@ -2437,7 +2431,7 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
return SDOperand(N, 0);
}
-SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
+SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT,
SDOperand N1, SDOperand N2, SDOperand N3) {
// Perform various simplifications.
ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
@@ -2469,9 +2463,9 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
break;
case ISD::VECTOR_SHUFFLE:
assert(VT == N1.getValueType() && VT == N2.getValueType() &&
- MVT::isVector(VT) && MVT::isVector(N3.getValueType()) &&
+ VT.isVector() && N3.getValueType().isVector() &&
N3.getOpcode() == ISD::BUILD_VECTOR &&
- MVT::getVectorNumElements(VT) == N3.getNumOperands() &&
+ VT.getVectorNumElements() == N3.getNumOperands() &&
"Illegal VECTOR_SHUFFLE node!");
break;
case ISD::BIT_CONVERT:
@@ -2500,14 +2494,14 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
return SDOperand(N, 0);
}
-SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
+SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT,
SDOperand N1, SDOperand N2, SDOperand N3,
SDOperand N4) {
SDOperand Ops[] = { N1, N2, N3, N4 };
return getNode(Opcode, VT, Ops, 4);
}
-SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
+SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT,
SDOperand N1, SDOperand N2, SDOperand N3,
SDOperand N4, SDOperand N5) {
SDOperand Ops[] = { N1, N2, N3, N4, N5 };
@@ -2516,10 +2510,9 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
/// getMemsetValue - Vectorized representation of the memset value
/// operand.
-static SDOperand getMemsetValue(SDOperand Value, MVT::ValueType VT,
- SelectionDAG &DAG) {
- unsigned NumBits = MVT::isVector(VT) ?
- MVT::getSizeInBits(MVT::getVectorElementType(VT)) : MVT::getSizeInBits(VT);
+static SDOperand getMemsetValue(SDOperand Value, MVT VT, SelectionDAG &DAG) {
+ unsigned NumBits = VT.isVector() ?
+ VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
APInt Val = APInt(NumBits, C->getValue() & 255);
unsigned Shift = 8;
@@ -2527,7 +2520,7 @@ static SDOperand getMemsetValue(SDOperand Value, MVT::ValueType VT,
Val = (Val << Shift) | Val;
Shift <<= 1;
}
- if (MVT::isInteger(VT))
+ if (VT.isInteger())
return DAG.getConstant(Val, VT);
return DAG.getConstantFP(APFloat(Val), VT);
}
@@ -2547,11 +2540,11 @@ static SDOperand getMemsetValue(SDOperand Value, MVT::ValueType VT,
/// getMemsetStringVal - Similar to getMemsetValue. Except this is only
/// used when a memcpy is turned into a memset when the source is a constant
/// string ptr.
-static SDOperand getMemsetStringVal(MVT::ValueType VT, SelectionDAG &DAG,
+static SDOperand getMemsetStringVal(MVT VT, SelectionDAG &DAG,
const TargetLowering &TLI,