diff options
Diffstat (limited to 'lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 35c981d7f3..5b1d10335c 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -808,7 +808,7 @@ SDOperand DAGCombiner::visitAND(SDNode *N) { if (ConstantSDNode *N01C = dyn_cast<ConstantSDNode>(N0.getOperand(1))) { // If the RHS of the AND has zeros where the sign bits of the SRA will // land, turn the SRA into an SRL. - if (MaskedValueIsZero(N1, (~0ULL << N01C->getValue()) & + if (MaskedValueIsZero(N1, (~0ULL << (OpSizeInBits-N01C->getValue())) & (~0ULL>>(64-OpSizeInBits)), TLI)) { WorkList.push_back(N); CombineTo(N0.Val, DAG.getNode(ISD::SRL, VT, N0.getOperand(0), |