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-rw-r--r--lib/CodeGen/RegAllocGreedy.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/CodeGen/RegAllocGreedy.cpp b/lib/CodeGen/RegAllocGreedy.cpp
index e88016fbb3..af2c55e7d8 100644
--- a/lib/CodeGen/RegAllocGreedy.cpp
+++ b/lib/CodeGen/RegAllocGreedy.cpp
@@ -232,7 +232,7 @@ unsigned RAGreedy::selectOrSplit(LiveInterval &VirtReg,
// Check for an available register in this class.
DEBUG({
const TargetRegisterClass *TRC = MRI->getRegClass(VirtReg.reg);
- dbgs() << "RegClass: " << TRC->getName() << ' ');
+ dbgs() << "RegClass: " << TRC->getName() << ' ';
});
AllocationOrder Order(VirtReg.reg, *VRM, ReservedRegs);