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-rw-r--r--include/llvm/CodeGen/AsmPrinter.h8
-rw-r--r--include/llvm/CodeGen/DwarfWriter.h2
-rw-r--r--include/llvm/CodeGen/LinkAllCodegenComponents.h10
-rw-r--r--include/llvm/CodeGen/SchedulerRegistry.h12
-rw-r--r--include/llvm/CodeGen/SelectionDAG.h4
-rw-r--r--include/llvm/CodeGen/SelectionDAGISel.h4
-rw-r--r--include/llvm/Target/TargetMachine.h42
-rw-r--r--include/llvm/Target/TargetOptions.h2
8 files changed, 44 insertions, 40 deletions
diff --git a/include/llvm/CodeGen/AsmPrinter.h b/include/llvm/CodeGen/AsmPrinter.h
index c1d86a2190..241a998925 100644
--- a/include/llvm/CodeGen/AsmPrinter.h
+++ b/include/llvm/CodeGen/AsmPrinter.h
@@ -65,8 +65,8 @@ namespace llvm {
// Necessary for external weak linkage support
std::set<const GlobalValue*> ExtWeakSymbols;
- /// Fast - Generating code via fast instruction selection.
- bool Fast;
+ /// OptLevel - Generating code at a specific optimization level.
+ unsigned OptLevel;
public:
/// Output stream on which we're printing assembly code.
///
@@ -110,8 +110,8 @@ namespace llvm {
bool VerboseAsm;
protected:
- AsmPrinter(raw_ostream &o, TargetMachine &TM,
- const TargetAsmInfo *T, bool F, bool V);
+ explicit AsmPrinter(raw_ostream &o, TargetMachine &TM,
+ const TargetAsmInfo *T, unsigned OL, bool V);
public:
virtual ~AsmPrinter();
diff --git a/include/llvm/CodeGen/DwarfWriter.h b/include/llvm/CodeGen/DwarfWriter.h
index 4b35b288c9..5641407001 100644
--- a/include/llvm/CodeGen/DwarfWriter.h
+++ b/include/llvm/CodeGen/DwarfWriter.h
@@ -81,7 +81,7 @@ public:
void EndFunction(MachineFunction *MF);
/// ValidDebugInfo - Return true if V represents valid debug info value.
- bool ValidDebugInfo(Value *V, bool FastISel);
+ bool ValidDebugInfo(Value *V, unsigned OptLevel);
/// RecordSourceLine - Register a source line with debug info. Returns a
/// unique label ID used to generate a label and provide correspondence to
diff --git a/include/llvm/CodeGen/LinkAllCodegenComponents.h b/include/llvm/CodeGen/LinkAllCodegenComponents.h
index 74026a4791..84d9819c2d 100644
--- a/include/llvm/CodeGen/LinkAllCodegenComponents.h
+++ b/include/llvm/CodeGen/LinkAllCodegenComponents.h
@@ -42,11 +42,11 @@ namespace {
llvm::linkOcamlGC();
llvm::linkShadowStackGC();
- (void) llvm::createBURRListDAGScheduler(NULL, false);
- (void) llvm::createTDRRListDAGScheduler(NULL, false);
- (void) llvm::createTDListDAGScheduler(NULL, false);
- (void) llvm::createFastDAGScheduler(NULL, false);
- (void) llvm::createDefaultScheduler(NULL, false);
+ (void) llvm::createBURRListDAGScheduler(NULL, 3);
+ (void) llvm::createTDRRListDAGScheduler(NULL, 3);
+ (void) llvm::createTDListDAGScheduler(NULL, 3);
+ (void) llvm::createFastDAGScheduler(NULL, 3);
+ (void) llvm::createDefaultScheduler(NULL, 3);
}
} ForceCodegenLinking; // Force link by creating a global definition.
diff --git a/include/llvm/CodeGen/SchedulerRegistry.h b/include/llvm/CodeGen/SchedulerRegistry.h
index c967bfc446..e02dc7a392 100644
--- a/include/llvm/CodeGen/SchedulerRegistry.h
+++ b/include/llvm/CodeGen/SchedulerRegistry.h
@@ -32,7 +32,7 @@ class MachineBasicBlock;
class RegisterScheduler : public MachinePassRegistryNode {
public:
- typedef ScheduleDAGSDNodes *(*FunctionPassCtor)(SelectionDAGISel*, bool);
+ typedef ScheduleDAGSDNodes *(*FunctionPassCtor)(SelectionDAGISel*, unsigned);
static MachinePassRegistry Registry;
@@ -64,27 +64,27 @@ public:
/// createBURRListDAGScheduler - This creates a bottom up register usage
/// reduction list scheduler.
ScheduleDAGSDNodes *createBURRListDAGScheduler(SelectionDAGISel *IS,
- bool Fast);
+ unsigned OptLevel);
/// createTDRRListDAGScheduler - This creates a top down register usage
/// reduction list scheduler.
ScheduleDAGSDNodes *createTDRRListDAGScheduler(SelectionDAGISel *IS,
- bool Fast);
+ unsigned OptLevel);
/// createTDListDAGScheduler - This creates a top-down list scheduler with
/// a hazard recognizer.
ScheduleDAGSDNodes *createTDListDAGScheduler(SelectionDAGISel *IS,
- bool Fast);
+ unsigned OptLevel);
/// createFastDAGScheduler - This creates a "fast" scheduler.
///
ScheduleDAGSDNodes *createFastDAGScheduler(SelectionDAGISel *IS,
- bool Fast);
+ unsigned OptLevel);
/// createDefaultScheduler - This creates an instruction scheduler appropriate
/// for the target.
ScheduleDAGSDNodes *createDefaultScheduler(SelectionDAGISel *IS,
- bool Fast);
+ unsigned OptLevel);
} // end namespace llvm
diff --git a/include/llvm/CodeGen/SelectionDAG.h b/include/llvm/CodeGen/SelectionDAG.h
index a350d5fd93..d2d17cfa2e 100644
--- a/include/llvm/CodeGen/SelectionDAG.h
+++ b/include/llvm/CodeGen/SelectionDAG.h
@@ -202,7 +202,7 @@ public:
/// certain types of nodes together, or eliminating superfluous nodes. The
/// Level argument controls whether Combine is allowed to produce nodes and
/// types that are illegal on the target.
- void Combine(CombineLevel Level, AliasAnalysis &AA, bool Fast);
+ void Combine(CombineLevel Level, AliasAnalysis &AA, unsigned OptLevel);
/// LegalizeTypes - This transforms the SelectionDAG into a SelectionDAG that
/// only uses types natively supported by the target. Returns "true" if it
@@ -218,7 +218,7 @@ public:
///
/// Note that this is an involved process that may invalidate pointers into
/// the graph.
- void Legalize(bool TypesNeedLegalizing, bool Fast);
+ void Legalize(bool TypesNeedLegalizing, unsigned OptLevel);
/// RemoveDeadNodes - This method deletes all unreachable nodes in the
/// SelectionDAG.
diff --git a/include/llvm/CodeGen/SelectionDAGISel.h b/include/llvm/CodeGen/SelectionDAGISel.h
index e6bf8d76f4..d8802c7d9d 100644
--- a/include/llvm/CodeGen/SelectionDAGISel.h
+++ b/include/llvm/CodeGen/SelectionDAGISel.h
@@ -51,10 +51,10 @@ public:
MachineBasicBlock *BB;
AliasAnalysis *AA;
GCFunctionInfo *GFI;
- bool Fast;
+ unsigned OptLevel;
static char ID;
- explicit SelectionDAGISel(TargetMachine &tm, bool fast = false);
+ explicit SelectionDAGISel(TargetMachine &tm, unsigned OL = 3);
virtual ~SelectionDAGISel();
TargetLowering &getTargetLowering() { return TLI; }
diff --git a/include/llvm/Target/TargetMachine.h b/include/llvm/Target/TargetMachine.h
index c4c0b0ec24..ba688b48de 100644
--- a/include/llvm/Target/TargetMachine.h
+++ b/include/llvm/Target/TargetMachine.h
@@ -213,7 +213,7 @@ public:
virtual FileModel::Model addPassesToEmitFile(PassManagerBase &,
raw_ostream &,
CodeGenFileType,
- bool /*Fast*/) {
+ unsigned /* OptLevel */) {
return FileModel::None;
}
@@ -222,7 +222,8 @@ public:
/// used to finish up adding passes to emit the file, if necessary.
///
virtual bool addPassesToEmitFileFinish(PassManagerBase &,
- MachineCodeEmitter *, bool /*Fast*/) {
+ MachineCodeEmitter *,
+ unsigned /* OptLevel */) {
return true;
}
@@ -234,7 +235,7 @@ public:
///
virtual bool addPassesToEmitMachineCode(PassManagerBase &,
MachineCodeEmitter &,
- bool /*Fast*/) {
+ unsigned /* OptLevel */) {
return true;
}
@@ -243,7 +244,8 @@ public:
/// use this.
virtual bool WantsWholeFile() const { return false; }
virtual bool addPassesToEmitWholeFile(PassManager &, raw_ostream &,
- CodeGenFileType, bool /*Fast*/) {
+ CodeGenFileType,
+ unsigned /* OptLevel */) {
return true;
}
};
@@ -258,16 +260,16 @@ protected: // Can only create subclasses.
/// addCommonCodeGenPasses - Add standard LLVM codegen passes used for
/// both emitting to assembly files or machine code output.
///
- bool addCommonCodeGenPasses(PassManagerBase &, bool /*Fast*/);
+ bool addCommonCodeGenPasses(PassManagerBase &, unsigned /* OptLevel */);
public:
/// addPassesToEmitFile - Add passes to the specified pass manager to get the
/// specified file emitted. Typically this will involve several steps of code
- /// generation. If Fast is set to true, the code generator should emit code
- /// as fast as possible, though the generated code may be less efficient.
- /// This method should return FileModel::Error if emission of this file type
- /// is not supported.
+ /// generation. If OptLevel is 0, the code generator should emit code as fast
+ /// as possible, though the generated code may be less efficient. This method
+ /// should return FileModel::Error if emission of this file type is not
+ /// supported.
///
/// The default implementation of this method adds components from the
/// LLVM retargetable code generator, invoking the methods below to get
@@ -276,14 +278,15 @@ public:
virtual FileModel::Model addPassesToEmitFile(PassManagerBase &PM,
raw_ostream &Out,
CodeGenFileType FileType,
- bool Fast);
+ unsigned OptLevel);
/// addPassesToEmitFileFinish - If the passes to emit the specified file had
/// to be split up (e.g., to add an object writer pass), this method can be
/// used to finish up adding passes to emit the file, if necessary.
///
virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
- MachineCodeEmitter *MCE, bool Fast);
+ MachineCodeEmitter *MCE,
+ unsigned OptLevel);
/// addPassesToEmitMachineCode - Add passes to the specified pass manager to
/// get machine code emitted. This uses a MachineCodeEmitter object to handle
@@ -292,21 +295,22 @@ public:
/// not supported.
///
virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
- MachineCodeEmitter &MCE, bool Fast);
+ MachineCodeEmitter &MCE,
+ unsigned OptLevel);
/// Target-Independent Code Generator Pass Configuration Options.
/// addInstSelector - This method should add any "last minute" LLVM->LLVM
/// passes, then install an instruction selector pass, which converts from
/// LLVM code to machine instructions.
- virtual bool addInstSelector(PassManagerBase &, bool /*Fast*/) {
+ virtual bool addInstSelector(PassManagerBase &, unsigned /* OptLevel */) {
return true;
}
/// addPreRegAllocPasses - This method may be implemented by targets that want
/// to run passes immediately before register allocation. This should return
/// true if -print-machineinstrs should print after these passes.
- virtual bool addPreRegAlloc(PassManagerBase &, bool /*Fast*/) {
+ virtual bool addPreRegAlloc(PassManagerBase &, unsigned /* OptLevel */) {
return false;
}
@@ -314,14 +318,14 @@ public:
/// want to run passes after register allocation but before prolog-epilog
/// insertion. This should return true if -print-machineinstrs should print
/// after these passes.
- virtual bool addPostRegAlloc(PassManagerBase &, bool /*Fast*/) {
+ virtual bool addPostRegAlloc(PassManagerBase &, unsigned /* OptLevel */) {
return false;
}
/// addPreEmitPass - This pass may be implemented by targets that want to run
/// passes immediately before machine code is emitted. This should return
/// true if -print-machineinstrs should print out the code after the passes.
- virtual bool addPreEmitPass(PassManagerBase &, bool /*Fast*/) {
+ virtual bool addPreEmitPass(PassManagerBase &, unsigned /* OptLevel */) {
return false;
}
@@ -329,7 +333,7 @@ public:
/// addAssemblyEmitter - This pass should be overridden by the target to add
/// the asmprinter, if asm emission is supported. If this is not supported,
/// 'true' should be returned.
- virtual bool addAssemblyEmitter(PassManagerBase &, bool /*Fast*/,
+ virtual bool addAssemblyEmitter(PassManagerBase &, unsigned /* OptLevel */,
bool /* VerboseAsmDefault */, raw_ostream &) {
return true;
}
@@ -337,7 +341,7 @@ public:
/// addCodeEmitter - This pass should be overridden by the target to add a
/// code emitter, if supported. If this is not supported, 'true' should be
/// returned. If DumpAsm is true, the generated assembly is printed to cerr.
- virtual bool addCodeEmitter(PassManagerBase &, bool /*Fast*/,
+ virtual bool addCodeEmitter(PassManagerBase &, unsigned /* OptLevel */,
bool /*DumpAsm*/, MachineCodeEmitter &) {
return true;
}
@@ -346,7 +350,7 @@ public:
/// a code emitter (without setting flags), if supported. If this is not
/// supported, 'true' should be returned. If DumpAsm is true, the generated
/// assembly is printed to cerr.
- virtual bool addSimpleCodeEmitter(PassManagerBase &, bool /*Fast*/,
+ virtual bool addSimpleCodeEmitter(PassManagerBase &, unsigned /* OptLevel */,
bool /*DumpAsm*/, MachineCodeEmitter &) {
return true;
}
diff --git a/include/llvm/Target/TargetOptions.h b/include/llvm/Target/TargetOptions.h
index e10384d7df..06d7d79441 100644
--- a/include/llvm/Target/TargetOptions.h
+++ b/include/llvm/Target/TargetOptions.h
@@ -108,7 +108,7 @@ namespace llvm {
/// generated.
extern bool DisableJumpTables;
- /// FastISel - This flag enables fast-path instruction selection
+ /// EnableFastISel - This flag enables fast-path instruction selection
/// which trades away generated code quality in favor of reducing
/// compile time.
extern bool EnableFastISel;
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2025-02-19 22:58:26 +0000