diff options
Diffstat (limited to 'include/llvm/CodeGen')
| -rw-r--r-- | include/llvm/CodeGen/MachineInstr.h | 20 | ||||
| -rw-r--r-- | include/llvm/CodeGen/MachineInstrBuilder.h | 6 | ||||
| -rw-r--r-- | include/llvm/CodeGen/MemOperand.h | 82 | ||||
| -rw-r--r-- | include/llvm/CodeGen/ScheduleDAG.h | 13 | ||||
| -rw-r--r-- | include/llvm/CodeGen/SelectionDAG.h | 8 | ||||
| -rw-r--r-- | include/llvm/CodeGen/SelectionDAGNodes.h | 47 |
6 files changed, 163 insertions, 13 deletions
diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h index 068c335c7d..5f3838787e 100644 --- a/include/llvm/CodeGen/MachineInstr.h +++ b/include/llvm/CodeGen/MachineInstr.h @@ -17,6 +17,7 @@ #define LLVM_CODEGEN_MACHINEINSTR_H #include "llvm/CodeGen/MachineOperand.h" +#include "llvm/CodeGen/MemOperand.h" namespace llvm { @@ -35,6 +36,7 @@ class MachineInstr { // are determined at construction time). std::vector<MachineOperand> Operands; // the operands + std::vector<MemOperand> MemOperands; // information on memory references MachineInstr *Prev, *Next; // Links for MBB's intrusive list. MachineBasicBlock *Parent; // Pointer to the owning basic block. @@ -94,6 +96,18 @@ public: /// unsigned getNumExplicitOperands() const; + /// Access to memory operands of the instruction + unsigned getNumMemOperands() const { return MemOperands.size(); } + + const MemOperand& getMemOperand(unsigned i) const { + assert(i < getNumMemOperands() && "getMemOperand() out of range!"); + return MemOperands[i]; + } + MemOperand& getMemOperand(unsigned i) { + assert(i < getNumMemOperands() && "getMemOperand() out of range!"); + return MemOperands[i]; + } + /// isIdenticalTo - Return true if this instruction is identical to (same /// opcode and same operands as) the specified instruction. bool isIdenticalTo(const MachineInstr *Other) const { @@ -192,6 +206,12 @@ public: /// void RemoveOperand(unsigned i); + /// addMemOperand - Add a MemOperand to the machine instruction, referencing + /// arbitrary storage. + void addMemOperand(const MemOperand &MO) { + MemOperands.push_back(MO); + } + private: /// getRegInfo - If this instruction is embedded into a MachineFunction, /// return the MachineRegisterInfo object for the current function, otherwise diff --git a/include/llvm/CodeGen/MachineInstrBuilder.h b/include/llvm/CodeGen/MachineInstrBuilder.h index 97d6736ac0..51900603ac 100644 --- a/include/llvm/CodeGen/MachineInstrBuilder.h +++ b/include/llvm/CodeGen/MachineInstrBuilder.h @@ -83,6 +83,12 @@ public: MI->addOperand(MachineOperand::CreateES(FnName, 0)); return *this; } + + /// addMemOperand - Add a memory operand to the machine instruction. + const MachineInstrBuilder &addMemOperand(const MemOperand &MO) const { + MI->addMemOperand(MO); + return *this; + } }; /// BuildMI - Builder interface. Specify how to create the initial instruction diff --git a/include/llvm/CodeGen/MemOperand.h b/include/llvm/CodeGen/MemOperand.h new file mode 100644 index 0000000000..e9f05f3eed --- /dev/null +++ b/include/llvm/CodeGen/MemOperand.h @@ -0,0 +1,82 @@ +//===-- llvm/CodeGen/MemOperand.h - MemOperand class ------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains the declaration of the MemOperand class, which is a +// description of a memory reference. It is used to help track dependencies +// in the backend. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_CODEGEN_MEMOPERAND_H +#define LLVM_CODEGEN_MEMOPERAND_H + +namespace llvm { + +class Value; + +//===----------------------------------------------------------------------===// +/// MemOperand - A description of a memory reference used in the backend. +/// Instead of holding a StoreInst or LoadInst, this class holds the address +/// Value of the reference along with a byte size and offset. This allows it +/// to describe lowered loads and stores. Also, the special PseudoSourceValue +/// objects can be used to represent loads and stores to memory locations +/// that aren't explicit in the regular LLVM IR. +/// +class MemOperand { + const Value *V; + unsigned int Flags; + int Offset; + int Size; + unsigned int Alignment; + +public: + /// Flags values. These may be or'd together. + enum MemOperandFlags { + /// The memory access reads data. + MOLoad = 1, + /// The memory access writes data. + MOStore = 2, + /// The memory access is volatile. + MOVolatile = 4 + }; + + /// MemOperand - Construct an MemOperand object with the specified + /// address Value, flags, offset, size, and alignment. + MemOperand(const Value *v, unsigned int f, int o, int s, unsigned int a) + : V(v), Flags(f), Offset(o), Size(s), Alignment(a) {} + + /// getValue - Return the base address of the memory access. + /// Special values are PseudoSourceValue::FPRel, PseudoSourceValue::SPRel, + /// and the other PseudoSourceValue members which indicate references to + /// frame/stack pointer relative references and other special references. + const Value *getValue() const { return V; } + + /// getFlags - Return the raw flags of the source value, \see MemOperandFlags. + unsigned int getFlags() const { return Flags; } + + /// getOffset - For normal values, this is a byte offset added to the base + /// address. For PseudoSourceValue::FPRel values, this is the FrameIndex + /// number. + int getOffset() const { return Offset; } + + /// getSize - Return the size in bytes of the memory reference. + int getSize() const { return Size; } + + /// getAlignment - Return the minimum known alignment in bytes of the + /// memory reference. + unsigned int getAlignment() const { return Alignment; } + + bool isLoad() const { return Flags & MOLoad; } + bool isStore() const { return Flags & MOStore; } + bool isVolatile() const { return Flags & MOVolatile; } +}; + +} // End llvm namespace + +#endif diff --git a/include/llvm/CodeGen/ScheduleDAG.h b/include/llvm/CodeGen/ScheduleDAG.h index 77d1a1cce4..fdd5700357 100644 --- a/include/llvm/CodeGen/ScheduleDAG.h +++ b/include/llvm/CodeGen/ScheduleDAG.h @@ -279,6 +279,7 @@ namespace llvm { if (isa<ConstantPoolSDNode>(Node)) return true; if (isa<JumpTableSDNode>(Node)) return true; if (isa<ExternalSymbolSDNode>(Node)) return true; + if (isa<MemOperandSDNode>(Node)) return true; return false; } @@ -312,11 +313,15 @@ namespace llvm { /// (which do not go into the machine instrs.) static unsigned CountResults(SDNode *Node); - /// CountOperands The inputs to target nodes have any actual inputs first, - /// followed by an optional chain operand, then flag operands. Compute the - /// number of actual operands that will go into the machine instr. + /// CountOperands - The inputs to target nodes have any actual inputs first, + /// followed by optional memory operands chain operand, then flag operands. + /// Compute the number of actual operands that will go into the machine + /// instr. static unsigned CountOperands(SDNode *Node); + /// CountMemOperands - Find the index of the last MemOperandSDNode + static unsigned CountMemOperands(SDNode *Node); + /// EmitNode - Generate machine code for an node and needed dependencies. /// VRBaseMap contains, for each already emitted node, the first virtual /// register number for the results of the node. @@ -357,6 +362,8 @@ namespace llvm { void AddOperand(MachineInstr *MI, SDOperand Op, unsigned IIOpNum, const TargetInstrDesc *II, DenseMap<SDOperand, unsigned> &VRBaseMap); + + void AddMemOperand(MachineInstr *MI, const MemOperand &MO); }; /// createBURRListDAGScheduler - This creates a bottom up register usage diff --git a/include/llvm/CodeGen/SelectionDAG.h b/include/llvm/CodeGen/SelectionDAG.h index a9ad9a452d..9730112719 100644 --- a/include/llvm/CodeGen/SelectionDAG.h +++ b/include/llvm/CodeGen/SelectionDAG.h @@ -381,8 +381,12 @@ public: SDOperand getIndexedStore(SDOperand OrigStoe, SDOperand Base, SDOperand Offset, ISD::MemIndexedMode AM); - // getSrcValue - construct a node to track a Value* through the backend - SDOperand getSrcValue(const Value* I, int offset = 0); + // getSrcValue - Construct a node to track a Value* through the backend. + SDOperand getSrcValue(const Value *v); + + // getMemOperand - Construct a node to track a memory reference + // through the backend. + SDOperand getMemOperand(const MemOperand &MO); /// UpdateNodeOperands - *Mutate* the specified node in-place to have the /// specified operands. If the resultant node already exists in the DAG, diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h index 833bd5be5e..308d264816 100644 --- a/include/llvm/CodeGen/SelectionDAGNodes.h +++ b/include/llvm/CodeGen/SelectionDAGNodes.h @@ -25,6 +25,7 @@ #include "llvm/ADT/iterator" #include "llvm/ADT/APFloat.h" #include "llvm/CodeGen/ValueTypes.h" +#include "llvm/CodeGen/MemOperand.h" #include "llvm/Support/DataTypes.h" #include <cassert> @@ -534,11 +535,15 @@ namespace ISD { // pointer, and a SRCVALUE. VAEND, VASTART, - // SRCVALUE - This corresponds to a Value*, and is used to associate memory - // locations with their value. This allows one use alias analysis - // information in the backend. + // SRCVALUE - This is a node type that holds a Value* that is used to + // make reference to a value in the LLVM IR. SRCVALUE, + // MEMOPERAND - This is a node that contains a MemOperand which records + // information about a memory reference. This is used to make AliasAnalysis + // queries from the backend. + MEMOPERAND, + // PCMARKER - This corresponds to the pcmarker intrinsic. PCMARKER, @@ -1378,17 +1383,16 @@ public: class SrcValueSDNode : public SDNode { const Value *V; - int offset; virtual void ANCHOR(); // Out-of-line virtual method to give class a home. protected: friend class SelectionDAG; - SrcValueSDNode(const Value* v, int o) - : SDNode(ISD::SRCVALUE, getSDVTList(MVT::Other)), V(v), offset(o) { - } + /// Create a SrcValue for a general value. + explicit SrcValueSDNode(const Value *v) + : SDNode(ISD::SRCVALUE, getSDVTList(MVT::Other)), V(v) {} public: + /// getValue - return the contained Value. const Value *getValue() const { return V; } - int getOffset() const { return offset; } static bool classof(const SrcValueSDNode *) { return true; } static bool classof(const SDNode *N) { @@ -1397,6 +1401,29 @@ public: }; +/// MemOperandSDNode - An SDNode that holds a MemOperand. This is +/// used to represent a reference to memory after ISD::LOAD +/// and ISD::STORE have been lowered. +/// +class MemOperandSDNode : public SDNode { + virtual void ANCHOR(); // Out-of-line virtual method to give class a home. +protected: + friend class SelectionDAG; + /// Create a MemOperand node + explicit MemOperandSDNode(MemOperand mo) + : SDNode(ISD::MEMOPERAND, getSDVTList(MVT::Other)), MO(mo) {} + +public: + /// MO - The contained MemOperand. + const MemOperand MO; + + static bool classof(const MemOperandSDNode *) { return true; } + static bool classof(const SDNode *N) { + return N->getOpcode() == ISD::MEMOPERAND; + } +}; + + class RegisterSDNode : public SDNode { unsigned Reg; virtual void ANCHOR(); // Out-of-line virtual method to give class a home. @@ -1546,6 +1573,10 @@ public: /// isUnindexed - Return true if this is NOT a pre/post inc/dec load/store. bool isUnindexed() const { return AddrMode == ISD::UNINDEXED; } + /// getMemOperand - Return a MemOperand object describing the memory + /// reference performed by this load or store. + MemOperand getMemOperand() const; + static bool classof(const LSBaseSDNode *N) { return true; } static bool classof(const SDNode *N) { return N->getOpcode() == ISD::LOAD || |