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-rw-r--r--include/llvm/CodeGen/LiveIntervalAnalysis.h8
-rw-r--r--include/llvm/CodeGen/MachineRegisterInfo.h7
2 files changed, 13 insertions, 2 deletions
diff --git a/include/llvm/CodeGen/LiveIntervalAnalysis.h b/include/llvm/CodeGen/LiveIntervalAnalysis.h
index 473cc8e099..84c6d67919 100644
--- a/include/llvm/CodeGen/LiveIntervalAnalysis.h
+++ b/include/llvm/CodeGen/LiveIntervalAnalysis.h
@@ -121,8 +121,12 @@ namespace llvm {
return getBaseIndex(index) + InstrSlots::STORE;
}
- static float getSpillWeight(bool isDef, bool isUse, unsigned loopDepth) {
- return (isDef + isUse) * powf(10.0F, (float)loopDepth);
+ static float getSpillWeight(bool isDef, bool isUse, bool isMem,
+ unsigned loopDepth) {
+ float Weight = isDef;
+ if (isUse)
+ Weight += isMem ? 1.2f : 1.0f;
+ return Weight * powf(10.0F, (float)loopDepth);
}
typedef Reg2IntervalMap::iterator iterator;
diff --git a/include/llvm/CodeGen/MachineRegisterInfo.h b/include/llvm/CodeGen/MachineRegisterInfo.h
index b93794c1be..bfa6d1ccd0 100644
--- a/include/llvm/CodeGen/MachineRegisterInfo.h
+++ b/include/llvm/CodeGen/MachineRegisterInfo.h
@@ -135,6 +135,13 @@ public:
assert(Reg < VRegInfo.size() && "Invalid vreg!");
return VRegInfo[Reg].first;
}
+
+ /// setRegClass - Set the register class of the specified virtual register.
+ void setRegClass(unsigned Reg, const TargetRegisterClass *RC) {
+ Reg -= TargetRegisterInfo::FirstVirtualRegister;
+ assert(Reg < VRegInfo.size() && "Invalid vreg!");
+ VRegInfo[Reg].first = RC;
+ }
/// createVirtualRegister - Create and return a new virtual register in the
/// function with the specified register class.