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Diffstat (limited to 'include/llvm/CodeGen/LiveIntervalAnalysis.h')
-rw-r--r--include/llvm/CodeGen/LiveIntervalAnalysis.h149
1 files changed, 88 insertions, 61 deletions
diff --git a/include/llvm/CodeGen/LiveIntervalAnalysis.h b/include/llvm/CodeGen/LiveIntervalAnalysis.h
index da9ff30edf..dbeedcf2ee 100644
--- a/include/llvm/CodeGen/LiveIntervalAnalysis.h
+++ b/include/llvm/CodeGen/LiveIntervalAnalysis.h
@@ -40,13 +40,13 @@ namespace llvm {
class TargetInstrInfo;
class TargetRegisterClass;
class VirtRegMap;
- typedef std::pair<unsigned, MachineBasicBlock*> IdxMBBPair;
+ typedef std::pair<MachineInstrIndex, MachineBasicBlock*> IdxMBBPair;
- inline bool operator<(unsigned V, const IdxMBBPair &IM) {
+ inline bool operator<(MachineInstrIndex V, const IdxMBBPair &IM) {
return V < IM.first;
}
- inline bool operator<(const IdxMBBPair &IM, unsigned V) {
+ inline bool operator<(const IdxMBBPair &IM, MachineInstrIndex V) {
return IM.first < V;
}
@@ -65,13 +65,16 @@ namespace llvm {
AliasAnalysis *aa_;
LiveVariables* lv_;
+
+
+
/// Special pool allocator for VNInfo's (LiveInterval val#).
///
BumpPtrAllocator VNInfoAllocator;
/// MBB2IdxMap - The indexes of the first and last instructions in the
/// specified basic block.
- std::vector<std::pair<unsigned, unsigned> > MBB2IdxMap;
+ std::vector<std::pair<MachineInstrIndex, MachineInstrIndex> > MBB2IdxMap;
/// Idx2MBBMap - Sorted list of pairs of index of first instruction
/// and MBB id.
@@ -80,7 +83,7 @@ namespace llvm {
/// FunctionSize - The number of instructions present in the function
uint64_t FunctionSize;
- typedef DenseMap<const MachineInstr*, unsigned> Mi2IndexMap;
+ typedef DenseMap<const MachineInstr*, MachineInstrIndex> Mi2IndexMap;
Mi2IndexMap mi2iMap_;
typedef std::vector<MachineInstr*> Index2MiMap;
@@ -89,7 +92,7 @@ namespace llvm {
typedef DenseMap<unsigned, LiveInterval*> Reg2IntervalMap;
Reg2IntervalMap r2iMap_;
- DenseMap<MachineBasicBlock*, unsigned> terminatorGaps;
+ DenseMap<MachineBasicBlock*, MachineInstrIndex> terminatorGaps;
BitVector allocatableRegs_;
@@ -101,23 +104,40 @@ namespace llvm {
static char ID; // Pass identification, replacement for typeid
LiveIntervals() : MachineFunctionPass(&ID) {}
- static unsigned getBaseIndex(unsigned index) {
- return index - (index % InstrSlots::NUM);
+ static MachineInstrIndex getBaseIndex(MachineInstrIndex index) {
+ return MachineInstrIndex(index, MachineInstrIndex::LOAD);
+ }
+ static MachineInstrIndex getBoundaryIndex(MachineInstrIndex index) {
+ return MachineInstrIndex(index,
+ (MachineInstrIndex::Slot)(MachineInstrIndex::NUM - 1));
+ }
+ static MachineInstrIndex getLoadIndex(MachineInstrIndex index) {
+ return MachineInstrIndex(index, MachineInstrIndex::LOAD);
+ }
+ static MachineInstrIndex getUseIndex(MachineInstrIndex index) {
+ return MachineInstrIndex(index, MachineInstrIndex::USE);
}
- static unsigned getBoundaryIndex(unsigned index) {
- return getBaseIndex(index + InstrSlots::NUM - 1);
+ static MachineInstrIndex getDefIndex(MachineInstrIndex index) {
+ return MachineInstrIndex(index, MachineInstrIndex::DEF);
}
- static unsigned getLoadIndex(unsigned index) {
- return getBaseIndex(index) + InstrSlots::LOAD;
+ static MachineInstrIndex getStoreIndex(MachineInstrIndex index) {
+ return MachineInstrIndex(index, MachineInstrIndex::STORE);
}
- static unsigned getUseIndex(unsigned index) {
- return getBaseIndex(index) + InstrSlots::USE;
+
+ MachineInstrIndex getNextSlot(MachineInstrIndex m) const {
+ return m.nextSlot();
+ }
+
+ MachineInstrIndex getNextIndex(MachineInstrIndex m) const {
+ return m.nextIndex();
}
- static unsigned getDefIndex(unsigned index) {
- return getBaseIndex(index) + InstrSlots::DEF;
+
+ MachineInstrIndex getPrevSlot(MachineInstrIndex m) const {
+ return m.prevSlot();
}
- static unsigned getStoreIndex(unsigned index) {
- return getBaseIndex(index) + InstrSlots::STORE;
+
+ MachineInstrIndex getPrevIndex(MachineInstrIndex m) const {
+ return m.prevIndex();
}
static float getSpillWeight(bool isDef, bool isUse, unsigned loopDepth) {
@@ -150,20 +170,20 @@ namespace llvm {
/// getMBBStartIdx - Return the base index of the first instruction in the
/// specified MachineBasicBlock.
- unsigned getMBBStartIdx(MachineBasicBlock *MBB) const {
+ MachineInstrIndex getMBBStartIdx(MachineBasicBlock *MBB) const {
return getMBBStartIdx(MBB->getNumber());
}
- unsigned getMBBStartIdx(unsigned MBBNo) const {
+ MachineInstrIndex getMBBStartIdx(unsigned MBBNo) const {
assert(MBBNo < MBB2IdxMap.size() && "Invalid MBB number!");
return MBB2IdxMap[MBBNo].first;
}
/// getMBBEndIdx - Return the store index of the last instruction in the
/// specified MachineBasicBlock.
- unsigned getMBBEndIdx(MachineBasicBlock *MBB) const {
+ MachineInstrIndex getMBBEndIdx(MachineBasicBlock *MBB) const {
return getMBBEndIdx(MBB->getNumber());
}
- unsigned getMBBEndIdx(unsigned MBBNo) const {
+ MachineInstrIndex getMBBEndIdx(unsigned MBBNo) const {
assert(MBBNo < MBB2IdxMap.size() && "Invalid MBB number!");
return MBB2IdxMap[MBBNo].second;
}
@@ -184,7 +204,7 @@ namespace llvm {
/// getMBBFromIndex - given an index in any instruction of an
/// MBB return a pointer the MBB
- MachineBasicBlock* getMBBFromIndex(unsigned index) const {
+ MachineBasicBlock* getMBBFromIndex(MachineInstrIndex index) const {
std::vector<IdxMBBPair>::const_iterator I =
std::lower_bound(Idx2MBBMap.begin(), Idx2MBBMap.end(), index);
// Take the pair containing the index
@@ -192,14 +212,14 @@ namespace llvm {
((I != Idx2MBBMap.end() && I->first > index) ||
(I == Idx2MBBMap.end() && Idx2MBBMap.size()>0)) ? (I-1): I;
- assert(J != Idx2MBBMap.end() && J->first < index+1 &&
+ assert(J != Idx2MBBMap.end() && J->first <= index &&
index <= getMBBEndIdx(J->second) &&
"index does not correspond to an MBB");
return J->second;
}
/// getInstructionIndex - returns the base index of instr
- unsigned getInstructionIndex(const MachineInstr* instr) const {
+ MachineInstrIndex getInstructionIndex(const MachineInstr* instr) const {
Mi2IndexMap::const_iterator it = mi2iMap_.find(instr);
assert(it != mi2iMap_.end() && "Invalid instruction!");
return it->second;
@@ -207,48 +227,50 @@ namespace llvm {
/// getInstructionFromIndex - given an index in any slot of an
/// instruction return a pointer the instruction
- MachineInstr* getInstructionFromIndex(unsigned index) const {
- index /= InstrSlots::NUM; // convert index to vector index
- assert(index < i2miMap_.size() &&
+ MachineInstr* getInstructionFromIndex(MachineInstrIndex index) const {
+ // convert index to vector index
+ unsigned i = index.getVecIndex();
+ assert(i < i2miMap_.size() &&
"index does not correspond to an instruction");
- return i2miMap_[index];
+ return i2miMap_[i];
}
/// hasGapBeforeInstr - Return true if the previous instruction slot,
/// i.e. Index - InstrSlots::NUM, is not occupied.
- bool hasGapBeforeInstr(unsigned Index) {
- Index = getBaseIndex(Index - InstrSlots::NUM);
+ bool hasGapBeforeInstr(MachineInstrIndex Index) {
+ Index = getBaseIndex(Index.prevIndex());
return getInstructionFromIndex(Index) == 0;
}
/// hasGapAfterInstr - Return true if the successive instruction slot,
/// i.e. Index + InstrSlots::Num, is not occupied.
- bool hasGapAfterInstr(unsigned Index) {
- Index = getBaseIndex(Index + InstrSlots::NUM);
+ bool hasGapAfterInstr(MachineInstrIndex Index) {
+ Index = getBaseIndex(Index.nextIndex());
return getInstructionFromIndex(Index) == 0;
}
/// findGapBeforeInstr - Find an empty instruction slot before the
/// specified index. If "Furthest" is true, find one that's furthest
/// away from the index (but before any index that's occupied).
- unsigned findGapBeforeInstr(unsigned Index, bool Furthest = false) {
- Index = getBaseIndex(Index - InstrSlots::NUM);
+ MachineInstrIndex findGapBeforeInstr(MachineInstrIndex Index,
+ bool Furthest = false) {
+ Index = getBaseIndex(Index.prevIndex());
if (getInstructionFromIndex(Index))
- return 0; // No gap!
+ return MachineInstrIndex(); // No gap!
if (!Furthest)
return Index;
- unsigned PrevIndex = getBaseIndex(Index - InstrSlots::NUM);
+ MachineInstrIndex PrevIndex = getBaseIndex(Index.prevIndex());
while (getInstructionFromIndex(Index)) {
Index = PrevIndex;
- PrevIndex = getBaseIndex(Index - InstrSlots::NUM);
+ PrevIndex = getBaseIndex(Index.prevIndex());
}
return Index;
}
/// InsertMachineInstrInMaps - Insert the specified machine instruction
/// into the instruction index map at the given index.
- void InsertMachineInstrInMaps(MachineInstr *MI, unsigned Index) {
- i2miMap_[Index / InstrSlots::NUM] = MI;
+ void InsertMachineInstrInMaps(MachineInstr *MI, MachineInstrIndex Index) {
+ i2miMap_[Index.index / MachineInstrIndex::NUM] = MI;
Mi2IndexMap::iterator it = mi2iMap_.find(MI);
assert(it == mi2iMap_.end() && "Already in map!");
mi2iMap_[MI] = Index;
@@ -268,12 +290,12 @@ namespace llvm {
/// findLiveInMBBs - Given a live range, if the value of the range
/// is live in any MBB returns true as well as the list of basic blocks
/// in which the value is live.
- bool findLiveInMBBs(unsigned Start, unsigned End,
+ bool findLiveInMBBs(MachineInstrIndex Start, MachineInstrIndex End,
SmallVectorImpl<MachineBasicBlock*> &MBBs) const;
/// findReachableMBBs - Return a list MBB that can be reached via any
/// branch or fallthroughs. Return true if the list is not empty.
- bool findReachableMBBs(unsigned Start, unsigned End,
+ bool findReachableMBBs(MachineInstrIndex Start, MachineInstrIndex End,
SmallVectorImpl<MachineBasicBlock*> &MBBs) const;
// Interval creation
@@ -292,7 +314,7 @@ namespace llvm {
/// addLiveRangeToEndOfBlock - Given a register and an instruction,
/// adds a live range from that instruction to the end of its MBB.
LiveRange addLiveRangeToEndOfBlock(unsigned reg,
- MachineInstr* startInst);
+ MachineInstr* startInst);
// Interval removal
@@ -315,7 +337,7 @@ namespace llvm {
// MachineInstr -> index mappings
Mi2IndexMap::iterator mi2i = mi2iMap_.find(MI);
if (mi2i != mi2iMap_.end()) {
- i2miMap_[mi2i->second/InstrSlots::NUM] = 0;
+ i2miMap_[mi2i->second.index/InstrSlots::NUM] = 0;
mi2iMap_.erase(mi2i);
}
}
@@ -326,10 +348,10 @@ namespace llvm {
Mi2IndexMap::iterator mi2i = mi2iMap_.find(MI);
if (mi2i == mi2iMap_.end())
return;
- i2miMap_[mi2i->second/InstrSlots::NUM] = NewMI;
+ i2miMap_[mi2i->second.index/InstrSlots::NUM] = NewMI;
Mi2IndexMap::iterator it = mi2iMap_.find(MI);
assert(it != mi2iMap_.end() && "Invalid instruction!");
- unsigned Index = it->second;
+ MachineInstrIndex Index = it->second;
mi2iMap_.erase(it);
mi2iMap_[NewMI] = Index;
}
@@ -413,27 +435,29 @@ namespace llvm {
/// (calls handlePhysicalRegisterDef and
/// handleVirtualRegisterDef)
void handleRegisterDef(MachineBasicBlock *MBB,
- MachineBasicBlock::iterator MI, unsigned MIIdx,
+ MachineBasicBlock::iterator MI,
+ MachineInstrIndex MIIdx,
MachineOperand& MO, unsigned MOIdx);
/// handleVirtualRegisterDef - update intervals for a virtual
/// register def
void handleVirtualRegisterDef(MachineBasicBlock *MBB,
MachineBasicBlock::iterator MI,
- unsigned MIIdx, MachineOperand& MO,
- unsigned MOIdx, LiveInterval& interval);
+ MachineInstrIndex MIIdx, MachineOperand& MO,
+ unsigned MOIdx,
+ LiveInterval& interval);
/// handlePhysicalRegisterDef - update intervals for a physical register
/// def.
void handlePhysicalRegisterDef(MachineBasicBlock* mbb,
MachineBasicBlock::iterator mi,
- unsigned MIIdx, MachineOperand& MO,
+ MachineInstrIndex MIIdx, MachineOperand& MO,
LiveInterval &interval,
MachineInstr *CopyMI);
/// handleLiveInRegister - Create interval for a livein register.
void handleLiveInRegister(MachineBasicBlock* mbb,
- unsigned MIIdx,
+ MachineInstrIndex MIIdx,
LiveInterval &interval, bool isAlias = false);
/// getReMatImplicitUse - If the remat definition MI has one (for now, we
@@ -446,7 +470,7 @@ namespace llvm {
/// which reaches the given instruction also reaches the specified use
/// index.
bool isValNoAvailableAt(const LiveInterval &li, MachineInstr *MI,
- unsigned UseIdx) const;
+ MachineInstrIndex UseIdx) const;
/// isReMaterializable - Returns true if the definition MI of the specified
/// val# of the specified interval is re-materializable. Also returns true
@@ -461,9 +485,9 @@ namespace llvm {
/// MI. If it is successul, MI is updated with the newly created MI and
/// returns true.
bool tryFoldMemoryOperand(MachineInstr* &MI, VirtRegMap &vrm,
- MachineInstr *DefMI, unsigned InstrIdx,
+ MachineInstr *DefMI, MachineInstrIndex InstrIdx,
SmallVector<unsigned, 2> &Ops,
- bool isSS, int Slot, unsigned Reg);
+ bool isSS, int FrameIndex, unsigned Reg);
/// canFoldMemoryOperand - Return true if the specified load / store
/// folding is possible.
@@ -474,7 +498,8 @@ namespace llvm {
/// anyKillInMBBAfterIdx - Returns true if there is a kill of the specified
/// VNInfo that's after the specified index but is within the basic block.
bool anyKillInMBBAfterIdx(const LiveInterval &li, const VNInfo *VNI,
- MachineBasicBlock *MBB, unsigned Idx) const;
+ MachineBasicBlock *MBB,
+ MachineInstrIndex Idx) const;
/// hasAllocatableSuperReg - Return true if the specified physical register
/// has any super register that's allocatable.
@@ -482,16 +507,17 @@ namespace llvm {
/// SRInfo - Spill / restore info.
struct SRInfo {
- int index;
+ MachineInstrIndex index;
unsigned vreg;
bool canFold;
- SRInfo(int i, unsigned vr, bool f) : index(i), vreg(vr), canFold(f) {};
+ SRInfo(MachineInstrIndex i, unsigned vr, bool f)
+ : index(i), vreg(vr), canFold(f) {}
};
- bool alsoFoldARestore(int Id, int index, unsigned vr,
+ bool alsoFoldARestore(int Id, MachineInstrIndex index, unsigned vr,
BitVector &RestoreMBBs,
DenseMap<unsigned,std::vector<SRInfo> >&RestoreIdxes);
- void eraseRestoreInfo(int Id, int index, unsigned vr,
+ void eraseRestoreInfo(int Id, MachineInstrIndex index, unsigned vr,
BitVector &RestoreMBBs,
DenseMap<unsigned,std::vector<SRInfo> >&RestoreIdxes);
@@ -510,8 +536,9 @@ namespace llvm {
/// functions for addIntervalsForSpills to rewrite uses / defs for the given
/// live range.
bool rewriteInstructionForSpills(const LiveInterval &li, const VNInfo *VNI,
- bool TrySplit, unsigned index, unsigned end, MachineInstr *MI,
- MachineInstr *OrigDefMI, MachineInstr *DefMI, unsigned Slot, int LdSlot,
+ bool TrySplit, MachineInstrIndex index, MachineInstrIndex end,
+ MachineInstr *MI, MachineInstr *OrigDefMI, MachineInstr *DefMI,
+ unsigned Slot, int LdSlot,
bool isLoad, bool isLoadSS, bool DefIsReMat, bool CanDelete,
VirtRegMap &vrm, const TargetRegisterClass* rc,
SmallVector<int, 4> &ReMatIds, const MachineLoopInfo *loopInfo,
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2024-11-26 15:42:27 +0000