diff options
| -rw-r--r-- | lib/Target/Mips/MipsDelaySlotFiller.cpp | 24 | ||||
| -rw-r--r-- | lib/Target/Mips/MipsISelLowering.cpp | 4 | ||||
| -rw-r--r-- | lib/Target/Mips/MipsISelLowering.h | 5 | ||||
| -rw-r--r-- | lib/Target/Mips/MipsSEISelLowering.cpp | 4 |
4 files changed, 34 insertions, 3 deletions
diff --git a/lib/Target/Mips/MipsDelaySlotFiller.cpp b/lib/Target/Mips/MipsDelaySlotFiller.cpp index d07a595af3..f5bb945592 100644 --- a/lib/Target/Mips/MipsDelaySlotFiller.cpp +++ b/lib/Target/Mips/MipsDelaySlotFiller.cpp @@ -527,6 +527,11 @@ FunctionPass *llvm::createMipsDelaySlotFillerPass(MipsTargetMachine &tm) { return new Filler(tm); } +// @LOCALMOD-START +extern bool IsDangerousLoad(const MachineInstr &MI, int *AddrIdx); +extern bool IsDangerousStore(const MachineInstr &MI, int *AddrIdx); +// @LOCALMOD-END + template<typename IterTy> bool Filler::searchRange(MachineBasicBlock &MBB, IterTy Begin, IterTy End, RegDefsUses &RegDU, InspectMemInstr& IM, @@ -536,8 +541,23 @@ bool Filler::searchRange(MachineBasicBlock &MBB, IterTy Begin, IterTy End, if (I->isDebugValue()) continue; - if (terminateSearch(*I)) - break; + // @LOCALMOD-START + // Don't put in delay slot instructions that could be masked. + // Should not allow: + // ERET, DERET or WAIT, PAUSE. Need to add these to instruction + // list. TBD. + if (Triple(TM.getTargetTriple()).isOSNaCl()) { + int Dummy; + if (terminateSearch(*I) || (IsDangerousLoad(*I, &Dummy) + || IsDangerousStore(*I, &Dummy) + || I->modifiesRegister(Mips::SP, + TM.getRegisterInfo()))) + break; + } else { + if (terminateSearch(*I)) + break; + } + // @LOCALMOD-END assert((!I->isCall() && !I->isReturn() && !I->isBranch()) && "Cannot put calls, returns or branches in delay slot."); diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp index 5fd2a82930..f065400dfb 100644 --- a/lib/Target/Mips/MipsISelLowering.cpp +++ b/lib/Target/Mips/MipsISelLowering.cpp @@ -759,6 +759,10 @@ LowerOperation(SDValue Op, SelectionDAG &DAG) const case ISD::LOAD: return lowerLOAD(Op, DAG); case ISD::STORE: return lowerSTORE(Op, DAG); case ISD::ADD: return lowerADD(Op, DAG); + // @LOCALMOD-BEGIN + case ISD::NACL_TP_TLS_OFFSET: return LowerNaClTpTlsOffset(Op, DAG); + case ISD::NACL_TP_TDB_OFFSET: return LowerNaClTpTdbOffset(Op, DAG); + // @LOCALMOD-END } return SDValue(); } diff --git a/lib/Target/Mips/MipsISelLowering.h b/lib/Target/Mips/MipsISelLowering.h index e62daba4a1..090f97ede3 100644 --- a/lib/Target/Mips/MipsISelLowering.h +++ b/lib/Target/Mips/MipsISelLowering.h @@ -320,6 +320,10 @@ namespace llvm { bool HasMips64, IsN64, IsO32; + // @LOCALMOD-BEGIN + SDValue GetNaClThreadPointer(SelectionDAG &DAG, DebugLoc DL) const; + // @LOCALMOD-END + private: // Lower Operand helpers SDValue LowerCallResult(SDValue Chain, SDValue InFlag, @@ -388,7 +392,6 @@ namespace llvm { // @LOCALMOD-BEGIN SDValue LowerNaClTpTlsOffset(SDValue Op, SelectionDAG &DAG) const; SDValue LowerNaClTpTdbOffset(SDValue Op, SelectionDAG &DAG) const; - SDValue GetNaClThreadPointer(SelectionDAG &DAG, DebugLoc DL) const; // @LOCALMOD-END virtual SDValue diff --git a/lib/Target/Mips/MipsSEISelLowering.cpp b/lib/Target/Mips/MipsSEISelLowering.cpp index 8544bb8910..c36f0af589 100644 --- a/lib/Target/Mips/MipsSEISelLowering.cpp +++ b/lib/Target/Mips/MipsSEISelLowering.cpp @@ -601,6 +601,10 @@ SDValue MipsSETargetLowering::lowerINTRINSIC_WO_CHAIN(SDValue Op, switch (cast<ConstantSDNode>(Op->getOperand(0))->getZExtValue()) { default: return SDValue(); + // @LOCALMOD-BEGIN + case Intrinsic::nacl_read_tp: + return GetNaClThreadPointer(DAG, Op->getDebugLoc()); + // @LOCALMOD-END case Intrinsic::mips_shilo: return lowerDSPIntr(Op, DAG, MipsISD::SHILO); case Intrinsic::mips_dpau_h_qbl: |