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-rw-r--r--lib/Target/SparcV9/InstrSelection/InstrSelectionSupport.cpp6
-rw-r--r--lib/Target/SparcV9/SparcV9InstrInfo.cpp37
-rw-r--r--lib/Target/SparcV9/SparcV9InstrSelection.cpp60
-rw-r--r--lib/Target/SparcV9/SparcV9PreSelection.cpp3
4 files changed, 48 insertions, 58 deletions
diff --git a/lib/Target/SparcV9/InstrSelection/InstrSelectionSupport.cpp b/lib/Target/SparcV9/InstrSelection/InstrSelectionSupport.cpp
index 7e0f6c48c6..b79f2f794c 100644
--- a/lib/Target/SparcV9/InstrSelection/InstrSelectionSupport.cpp
+++ b/lib/Target/SparcV9/InstrSelection/InstrSelectionSupport.cpp
@@ -41,8 +41,7 @@ InsertCodeToLoadConstant(Function *F,
MachineCodeForInstruction &mcfi = MachineCodeForInstruction::get(vmInstr);
TmpInstruction* tmpReg = new TmpInstruction(mcfi, opValue);
- target.getInstrInfo()->CreateCodeToLoadConst(target, F, opValue, tmpReg,
- loadConstVec, mcfi);
+ CreateCodeToLoadConst(target, F, opValue, tmpReg, loadConstVec, mcfi);
// Record the mapping from the tmp VM instruction to machine instruction.
// Do this for all machine instructions that were not mapped to any
@@ -96,8 +95,7 @@ ChooseRegOrImmed(Value* val,
// TargetInstrInfo::ConvertConstantToIntType() does the right conversions:
bool isValidConstant;
uint64_t valueToUse =
- target.getInstrInfo()->ConvertConstantToIntType(target, val, val->getType(),
- isValidConstant);
+ ConvertConstantToIntType(target, val, val->getType(), isValidConstant);
if (! isValidConstant)
return MachineOperand::MO_VirtualRegister;
diff --git a/lib/Target/SparcV9/SparcV9InstrInfo.cpp b/lib/Target/SparcV9/SparcV9InstrInfo.cpp
index c2ffceed6e..80a66fba24 100644
--- a/lib/Target/SparcV9/SparcV9InstrInfo.cpp
+++ b/lib/Target/SparcV9/SparcV9InstrInfo.cpp
@@ -45,10 +45,10 @@ static const uint32_t MAXSIMM = (1 << 12) - 1; // set bits in simm13 field of OR
//---------------------------------------------------------------------------
uint64_t
-SparcV9InstrInfo::ConvertConstantToIntType(const TargetMachine &target,
+ConvertConstantToIntType(const TargetMachine &target,
const Value *V,
const Type *destType,
- bool &isValidConstant) const
+ bool &isValidConstant)
{
isValidConstant = false;
uint64_t C = 0;
@@ -426,10 +426,7 @@ SparcV9InstrInfo::SparcV9InstrInfo()
InitializeMaxConstantsTable();
}
-bool
-SparcV9InstrInfo::ConstantMayNotFitInImmedField(const Constant* CV,
- const Instruction* I) const
-{
+bool ConstantMayNotFitInImmedField(const Constant* CV, const Instruction* I) {
if (I->getOpcode() >= MaxConstantsTable.size()) // user-defined op (or bug!)
return true;
@@ -457,12 +454,12 @@ SparcV9InstrInfo::ConstantMayNotFitInImmedField(const Constant* CV,
// Any stack space required is allocated via MachineFunction.
//
void
-SparcV9InstrInfo::CreateCodeToLoadConst(const TargetMachine& target,
+CreateCodeToLoadConst(const TargetMachine& target,
Function* F,
Value* val,
Instruction* dest,
std::vector<MachineInstr*>& mvec,
- MachineCodeForInstruction& mcfi) const
+ MachineCodeForInstruction& mcfi)
{
assert(isa<Constant>(val) &&
"I only know about constant values and global addresses");
@@ -541,7 +538,6 @@ SparcV9InstrInfo::CreateCodeToLoadConst(const TargetMachine& target,
}
}
-
// Create an instruction sequence to copy an integer register `val'
// to a floating point register `dest' by copying to memory and back.
// val must be an integral type. dest must be a Float or Double.
@@ -550,12 +546,12 @@ SparcV9InstrInfo::CreateCodeToLoadConst(const TargetMachine& target,
// Any stack space required is allocated via MachineFunction.
//
void
-SparcV9InstrInfo::CreateCodeToCopyIntToFloat(const TargetMachine& target,
+CreateCodeToCopyIntToFloat(const TargetMachine& target,
Function* F,
Value* val,
Instruction* dest,
std::vector<MachineInstr*>& mvec,
- MachineCodeForInstruction& mcfi) const
+ MachineCodeForInstruction& mcfi)
{
assert((val->getType()->isIntegral() || isa<PointerType>(val->getType()))
&& "Source type must be integral (integer or bool) or pointer");
@@ -611,12 +607,12 @@ SparcV9InstrInfo::CreateCodeToCopyIntToFloat(const TargetMachine& target,
// Temporary stack space required is allocated via MachineFunction.
//
void
-SparcV9InstrInfo::CreateCodeToCopyFloatToInt(const TargetMachine& target,
+CreateCodeToCopyFloatToInt(const TargetMachine& target,
Function* F,
Value* val,
Instruction* dest,
std::vector<MachineInstr*>& mvec,
- MachineCodeForInstruction& mcfi) const
+ MachineCodeForInstruction& mcfi)
{
const Type* opTy = val->getType();
const Type* destTy = dest->getType();
@@ -662,12 +658,12 @@ SparcV9InstrInfo::CreateCodeToCopyFloatToInt(const TargetMachine& target,
// Any stack space required is allocated via MachineFunction.
//
void
-SparcV9InstrInfo::CreateCopyInstructionsByType(const TargetMachine& target,
+CreateCopyInstructionsByType(const TargetMachine& target,
Function *F,
Value* src,
Instruction* dest,
std::vector<MachineInstr*>& mvec,
- MachineCodeForInstruction& mcfi) const
+ MachineCodeForInstruction& mcfi)
{
bool loadConstantToReg = false;
@@ -697,8 +693,7 @@ SparcV9InstrInfo::CreateCopyInstructionsByType(const TargetMachine& target,
if (loadConstantToReg) {
// `src' is constant and cannot fit in immed field for the ADD
// Insert instructions to "load" the constant into a register
- target.getInstrInfo()->CreateCodeToLoadConst(target, F, src, dest,
- mvec, mcfi);
+ CreateCodeToLoadConst(target, F, src, dest, mvec, mcfi);
} else {
// Create a reg-to-reg copy instruction for the given type:
// -- For FP values, create a FMOVS or FMOVD instruction
@@ -756,14 +751,14 @@ CreateBitExtensionInstructions(bool signExtend,
// Any stack space required is allocated via MachineFunction.
//
void
-SparcV9InstrInfo::CreateSignExtensionInstructions(
+CreateSignExtensionInstructions(
const TargetMachine& target,
Function* F,
Value* srcVal,
Value* destVal,
unsigned int numLowBits,
std::vector<MachineInstr*>& mvec,
- MachineCodeForInstruction& mcfi) const
+ MachineCodeForInstruction& mcfi)
{
CreateBitExtensionInstructions(/*signExtend*/ true, target, F, srcVal,
destVal, numLowBits, mvec, mcfi);
@@ -778,14 +773,14 @@ SparcV9InstrInfo::CreateSignExtensionInstructions(
// Any stack space required is allocated via MachineFunction.
//
void
-SparcV9InstrInfo::CreateZeroExtensionInstructions(
+CreateZeroExtensionInstructions(
const TargetMachine& target,
Function* F,
Value* srcVal,
Value* destVal,
unsigned int numLowBits,
std::vector<MachineInstr*>& mvec,
- MachineCodeForInstruction& mcfi) const
+ MachineCodeForInstruction& mcfi)
{
CreateBitExtensionInstructions(/*signExtend*/ false, target, F, srcVal,
destVal, numLowBits, mvec, mcfi);
diff --git a/lib/Target/SparcV9/SparcV9InstrSelection.cpp b/lib/Target/SparcV9/SparcV9InstrSelection.cpp
index f53f856fea..0dd02c04a0 100644
--- a/lib/Target/SparcV9/SparcV9InstrSelection.cpp
+++ b/lib/Target/SparcV9/SparcV9InstrSelection.cpp
@@ -592,14 +592,13 @@ CreateCodeToConvertFloatToInt(const TargetMachine& target,
castDestType));
// Create the fpreg-to-intreg copy code
- target.getInstrInfo()->CreateCodeToCopyFloatToInt(target, F, destForCast,
- fpToIntCopyDest, mvec, mcfi);
+ CreateCodeToCopyFloatToInt(target, F, destForCast, fpToIntCopyDest, mvec,
+ mcfi);
// Create the uint64_t to uint32_t conversion, if needed
if (destI->getType() == Type::UIntTy)
- target.getInstrInfo()->
- CreateZeroExtensionInstructions(target, F, fpToIntCopyDest, destI,
- /*numLowBits*/ 32, mvec, mcfi);
+ CreateZeroExtensionInstructions(target, F, fpToIntCopyDest, destI,
+ /*numLowBits*/ 32, mvec, mcfi);
}
@@ -793,9 +792,8 @@ CreateShiftInstructions(const TargetMachine& target,
if (shiftDest != destVal) {
// extend the sign-bit of the result into all upper bits of dest
assert(8*opSize <= 32 && "Unexpected type size > 4 and < IntRegSize?");
- target.getInstrInfo()->
- CreateSignExtensionInstructions(target, F, shiftDest, destVal,
- 8*opSize, mvec, mcfi);
+ CreateSignExtensionInstructions(target, F, shiftDest, destVal, 8*opSize,
+ mvec, mcfi);
}
}
@@ -826,8 +824,9 @@ CreateMulConstInstruction(const TargetMachine &target, Function* F,
if (resultType->isInteger() || isa<PointerType>(resultType)) {
bool isValidConst;
- int64_t C = (int64_t) target.getInstrInfo()->ConvertConstantToIntType(target,
- constOp, constOp->getType(), isValidConst);
+ int64_t C = (int64_t) ConvertConstantToIntType(target, constOp,
+ constOp->getType(),
+ isValidConst);
if (isValidConst) {
unsigned pow;
bool needNeg = false;
@@ -897,7 +896,7 @@ CreateCheapestMulConstInstruction(const TargetMachine &target,
Constant* P = ConstantExpr::get(Instruction::Mul,
cast<Constant>(lval),
cast<Constant>(rval));
- target.getInstrInfo()->CreateCodeToLoadConst(target,F,P,destVal,mvec,mcfi);
+ CreateCodeToLoadConst (target, F, P, destVal, mvec, mcfi);
}
else if (isa<Constant>(rval)) // rval is constant, but not lval
CreateMulConstInstruction(target, F, lval, rval, destVal, mvec, mcfi);
@@ -980,8 +979,9 @@ CreateDivConstInstruction(TargetMachine &target,
if (resultType->isInteger()) {
unsigned pow;
bool isValidConst;
- int64_t C = (int64_t) target.getInstrInfo()->ConvertConstantToIntType(target,
- constOp, constOp->getType(), isValidConst);
+ int64_t C = (int64_t) ConvertConstantToIntType(target, constOp,
+ constOp->getType(),
+ isValidConst);
if (isValidConst) {
bool needNeg = false;
if (C < 0) {
@@ -1089,7 +1089,7 @@ CreateCodeForVariableSizeAlloca(const TargetMachine& target,
// compile time if the total size is a known constant.
if (isa<Constant>(numElementsVal)) {
bool isValid;
- int64_t numElem = (int64_t) target.getInstrInfo()->
+ int64_t numElem = (int64_t)
ConvertConstantToIntType(target, numElementsVal,
numElementsVal->getType(), isValid);
assert(isValid && "Unexpectedly large array dimension in alloca!");
@@ -1567,7 +1567,7 @@ GetInstructionsByRule(InstructionNode* subtreeRoot,
retValToUse = new TmpInstruction(mcfi, retVal);
// sign-extend retVal and put the result in the temporary reg.
- target.getInstrInfo()->CreateSignExtensionInstructions
+ CreateSignExtensionInstructions
(target, returnInstr->getParent()->getParent(),
retVal, retValToUse, 8*retSize, mvec, mcfi);
}
@@ -1637,7 +1637,7 @@ GetInstructionsByRule(InstructionNode* subtreeRoot,
if ((constVal->getType()->isInteger()
|| isa<PointerType>(constVal->getType()))
- && target.getInstrInfo()->ConvertConstantToIntType(target,
+ && ConvertConstantToIntType(target,
constVal, constVal->getType(), isValidConst) == 0
&& isValidConst)
{
@@ -1889,15 +1889,15 @@ GetInstructionsByRule(InstructionNode* subtreeRoot,
? new TmpInstruction(mcfi, destType, opVal)
: destI);
- target.getInstrInfo()->CreateSignExtensionInstructions
+ CreateSignExtensionInstructions
(target, currentFunc,opVal,signExtDest,extSourceInBits,mvec,mcfi);
if (signAndZeroExtend)
- target.getInstrInfo()->CreateZeroExtensionInstructions
+ CreateZeroExtensionInstructions
(target, currentFunc, signExtDest, destI, 8*destSize, mvec, mcfi);
}
else if (zeroExtendOnly) {
- target.getInstrInfo()->CreateZeroExtensionInstructions
+ CreateZeroExtensionInstructions
(target, currentFunc, opVal, destI, extSourceInBits, mvec, mcfi);
}
else
@@ -1955,7 +1955,7 @@ GetInstructionsByRule(InstructionNode* subtreeRoot,
MachineCodeForInstruction::get(dest);
srcForCast = new TmpInstruction(destMCFI, tmpTypeToUse, dest);
- target.getInstrInfo()->CreateCodeToCopyIntToFloat(target,
+ CreateCodeToCopyIntToFloat(target,
dest->getParent()->getParent(),
leftVal, cast<Instruction>(srcForCast),
mvec, destMCFI);
@@ -2067,13 +2067,11 @@ GetInstructionsByRule(InstructionNode* subtreeRoot,
MachineCodeForInstruction& mcfi=MachineCodeForInstruction::get(divI);
divOp1ToUse = new TmpInstruction(mcfi, divOp1);
divOp2ToUse = new TmpInstruction(mcfi, divOp2);
- target.getInstrInfo()->
- CreateSignExtensionInstructions(target,
+ CreateSignExtensionInstructions(target,
divI->getParent()->getParent(),
divOp1, divOp1ToUse,
8*opSize, mvec, mcfi);
- target.getInstrInfo()->
- CreateSignExtensionInstructions(target,
+ CreateSignExtensionInstructions(target,
divI->getParent()->getParent(),
divOp2, divOp2ToUse,
8*opSize, mvec, mcfi);
@@ -2109,8 +2107,7 @@ GetInstructionsByRule(InstructionNode* subtreeRoot,
unsigned opSize=target.getTargetData().getTypeSize(divOp2->getType());
if (opSize < 8) {
divOpToUse = new TmpInstruction(mcfi, divOp2);
- target.getInstrInfo()->
- CreateSignExtensionInstructions(target,
+ CreateSignExtensionInstructions(target,
remI->getParent()->getParent(),
divOp2, divOpToUse,
8*opSize, mvec, mcfi);
@@ -2251,7 +2248,7 @@ GetInstructionsByRule(InstructionNode* subtreeRoot,
if ((constVal->getType()->isInteger()
|| isa<PointerType>(constVal->getType()))
- && target.getInstrInfo()->ConvertConstantToIntType(target,
+ && ConvertConstantToIntType(target,
constVal, constVal->getType(), isValidConst) == 0
&& isValidConst)
{
@@ -2328,10 +2325,10 @@ GetInstructionsByRule(InstructionNode* subtreeRoot,
rightOpToUse = new TmpInstruction(mcfi, rightVal);
// sign-extend each operand and put the result in the temporary reg.
- target.getInstrInfo()->CreateSignExtensionInstructions
+ CreateSignExtensionInstructions
(target, setCCInstr->getParent()->getParent(),
leftVal, leftOpToUse, 8*opSize, mvec, mcfi);
- target.getInstrInfo()->CreateSignExtensionInstructions
+ CreateSignExtensionInstructions
(target, setCCInstr->getParent()->getParent(),
rightVal, rightOpToUse, 8*opSize, mvec, mcfi);
}
@@ -2506,7 +2503,7 @@ GetInstructionsByRule(InstructionNode* subtreeRoot,
TmpInstruction* argExtend = new TmpInstruction(mcfi, argVal);
// sign-extend argVal and put the result in the temporary reg.
- target.getInstrInfo()->CreateSignExtensionInstructions
+ CreateSignExtensionInstructions
(target, currentFunc, argVal, argExtend,
8*argSize, mvec, mcfi);
@@ -2826,8 +2823,7 @@ GetInstructionsByRule(InstructionNode* subtreeRoot,
else {
std::vector<MachineInstr*> minstrVec;
Instruction* instr = subtreeRoot->getInstruction();
- target.getInstrInfo()->
- CreateCopyInstructionsByType(target,
+ CreateCopyInstructionsByType(target,
instr->getParent()->getParent(),
instr->getOperand(forwardOperandNum),
instr, minstrVec,
diff --git a/lib/Target/SparcV9/SparcV9PreSelection.cpp b/lib/Target/SparcV9/SparcV9PreSelection.cpp
index fc629a6a3f..f6ab34aa1e 100644
--- a/lib/Target/SparcV9/SparcV9PreSelection.cpp
+++ b/lib/Target/SparcV9/SparcV9PreSelection.cpp
@@ -16,6 +16,7 @@
//===----------------------------------------------------------------------===//
#include "SparcV9Internals.h"
+#include "SparcV9InstrSelectionSupport.h"
#include "llvm/Constants.h"
#include "llvm/DerivedTypes.h"
#include "llvm/iMemory.h"
@@ -180,7 +181,7 @@ PreSelection::visitOneOperand(Instruction &I, Value* Op, unsigned opNum,
// load address of constant into a register, then load the constant
// this is now done during instruction selection
// the constant will live in the MachineConstantPool later on
- } else if (instrInfo.ConstantMayNotFitInImmedField(CV, &I)) {
+ } else if (ConstantMayNotFitInImmedField(CV, &I)) {
// put the constant into a virtual register using a cast
CastInst* castI = new CastInst(CV, CV->getType(), "copyConst",
&insertBefore);