diff options
| -rw-r--r-- | lib/Target/ARM/ARMISelLowering.cpp | 9 | ||||
| -rw-r--r-- | test/CodeGen/ARM/this-return.ll | 64 |
2 files changed, 70 insertions, 3 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index 8658e975e3..46af4571a0 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -1252,7 +1252,8 @@ ARMTargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag, // Pass 'this' value directly from the argument to return value, to avoid // reg unit interference if (i == 0 && isThisReturn) { - assert(!VA.needsCustom() && VA.getLocVT() == MVT::i32); + assert(!VA.needsCustom() && VA.getLocVT() == MVT::i32 && + "unexpected return calling convention register assignment"); InVals.push_back(ThisVal); continue; } @@ -1466,8 +1467,10 @@ ARMTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI, StackPtr, MemOpChains, Flags); } } else if (VA.isRegLoc()) { - if (realArgIdx == 0 && Flags.isReturned() && VA.getLocVT() == MVT::i32) { - assert(!Ins.empty() && Ins[0].VT == Outs[0].VT && + if (realArgIdx == 0 && Flags.isReturned() && Outs[0].VT == MVT::i32) { + assert(VA.getLocVT() == MVT::i32 && + "unexpected calling convention register assignment"); + assert(!Ins.empty() && Ins[0].VT == MVT::i32 && "unexpected use of 'returned'"); isThisReturn = true; } diff --git a/test/CodeGen/ARM/this-return.ll b/test/CodeGen/ARM/this-return.ll index f06e4a4f8d..3047302ea7 100644 --- a/test/CodeGen/ARM/this-return.ll +++ b/test/CodeGen/ARM/this-return.ll @@ -103,3 +103,67 @@ entry: %call2 = tail call %struct.B* @B_ctor_complete(%struct.B* %b2, i32 %x) ret %struct.E* %this } + +declare i16 @identity16(i16 returned %x) +declare zeroext i16 @zeroext16(i16 returned %x) +declare i32 @identity32(i32 returned %x) + +define i16 @test_identity(i16 %x) { +entry: +; CHECKELF: test_identity: +; CHECKELF: mov [[SAVEX:r[0-9]+]], r0 +; CHECKELF: bl identity16 +; CHECKELF: uxth r0, [[SAVEX]] +; CHECKELF: bl identity32 +; CHECKELF: mov r0, [[SAVEX]] +; CHECKT2D: test_identity: +; CHECKT2D: mov [[SAVEX:r[0-9]+]], r0 +; CHECKT2D: blx _identity16 +; CHECKT2D: uxth r0, [[SAVEX]] +; CHECKT2D: blx _identity32 +; CHECKT2D: mov r0, [[SAVEX]] + %call = tail call i16 @identity16(i16 %x) + %b = zext i16 %x to i32 + %call2 = tail call i32 @identity32(i32 %b) + ret i16 %call +} + +define i16 @test_matched_ext(i16 %x) { +entry: +; CHECKELF: test_matched_ext: +; CHECKELF-NOT: mov {{r[0-9]+}}, r0 +; CHECKELF: bl zeroext16 +; CHECKELF-NOT: uxth r0, {{r[0-9]+}} +; CHECKELF: bl identity32 +; CHECKELF-NOT: mov r0, {{r[0-9]+}} +; CHECKT2D: test_matched_ext: +; CHECKT2D-NOT: mov {{r[0-9]+}}, r0 +; CHECKT2D: blx _zeroext16 +; CHECKT2D-NOT: uxth r0, {{r[0-9]+}} +; CHECKT2D: blx _identity32 +; CHECKT2D-NOT: mov r0, {{r[0-9]+}} + %call = tail call i16 @zeroext16(i16 %x) + %b = zext i16 %call to i32 + %call2 = tail call i32 @identity32(i32 %b) + ret i16 %call +} + +define i16 @test_mismatched_ext(i16 %x) { +entry: +; CHECKELF: test_mismatched_ext: +; CHECKELF: mov [[SAVEX:r[0-9]+]], r0 +; CHECKELF: bl zeroext16 +; CHECKELF: sxth r0, [[SAVEX]] +; CHECKELF: bl identity32 +; CHECKELF: mov r0, [[SAVEX]] +; CHECKT2D: test_mismatched_ext: +; CHECKT2D: mov [[SAVEX:r[0-9]+]], r0 +; CHECKT2D: blx _zeroext16 +; CHECKT2D: sxth r0, [[SAVEX]] +; CHECKT2D: blx _identity32 +; CHECKT2D: mov r0, [[SAVEX]] + %call = tail call i16 @zeroext16(i16 %x) + %b = sext i16 %call to i32 + %call2 = tail call i32 @identity32(i32 %b) + ret i16 %call +} |