diff options
| -rw-r--r-- | lib/Target/X86/X86InstrInfo.td | 32 | ||||
| -rw-r--r-- | lib/Target/X86/X86RegisterInfo.cpp | 4 |
2 files changed, 36 insertions, 0 deletions
diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index c5e9dcc809..dc9afa37af 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -486,6 +486,34 @@ def CMOVNS32rm: I<0x49, MRMSrcMem, // if !signed, R32 = [mem32] (ops R32:$dst, R32:$src1, i32mem:$src2), "cmovns {$src2, $dst|$dst, $src2}">, TB; +def CMOVP16rr : I<0x4A, MRMSrcReg, // if parity, R16 = R16 + (ops R16:$dst, R16:$src1, R16:$src2), + "cmovp {$src2, $dst|$dst, $src2}">, TB, OpSize; +def CMOVP16rm : I<0x4A, MRMSrcMem, // if parity, R16 = [mem16] + (ops R16:$dst, R16:$src1, i16mem:$src2), + "cmovp {$src2, $dst|$dst, $src2}">, TB, OpSize; +def CMOVP32rr : I<0x4A, MRMSrcReg, // if parity, R32 = R32 + (ops R32:$dst, R32:$src1, R32:$src2), + "cmovp {$src2, $dst|$dst, $src2}">, TB; +def CMOVP32rm : I<0x4A, MRMSrcMem, // if parity, R32 = [mem32] + (ops R32:$dst, R32:$src1, i32mem:$src2), + "cmovp {$src2, $dst|$dst, $src2}">, TB; + + +def CMOVNP16rr : I<0x4B, MRMSrcReg, // if !parity, R16 = R16 + (ops R16:$dst, R16:$src1, R16:$src2), + "cmovnp {$src2, $dst|$dst, $src2}">, TB, OpSize; +def CMOVNP16rm : I<0x4B, MRMSrcMem, // if !parity, R16 = [mem16] + (ops R16:$dst, R16:$src1, i16mem:$src2), + "cmovnp {$src2, $dst|$dst, $src2}">, TB, OpSize; +def CMOVNP32rr : I<0x4B, MRMSrcReg, // if !parity, R32 = R32 + (ops R32:$dst, R32:$src1, R32:$src2), + "cmovnp {$src2, $dst|$dst, $src2}">, TB; +def CMOVNP32rm : I<0x4B, MRMSrcMem, // if !parity, R32 = [mem32] + (ops R32:$dst, R32:$src1, i32mem:$src2), + "cmovnp {$src2, $dst|$dst, $src2}">, TB; + + def CMOVL16rr : I<0x4C, MRMSrcReg, // if <s, R16 = R16 (ops R16:$dst, R16:$src1, R16:$src2), "cmovl {$src2, $dst|$dst, $src2}">, TB, OpSize; @@ -1355,12 +1383,16 @@ let isTwoAddress = 1, Uses = [ST0], Defs = [ST0] in { (ops RST:$op), "fcmovbe {$op, %ST(0)|%ST(0), $op}">, DA; def FCMOVE : FPI<0xC8, AddRegFrm, CondMovFP, (ops RST:$op), "fcmove {$op, %ST(0)|%ST(0), $op}">, DA; + def FCMOVP : FPI<0xD8, AddRegFrm, CondMovFP, + (ops RST:$op), "fcmovu {$op, %ST(0)|%ST(0), $op}">, DA; def FCMOVAE : FPI<0xC0, AddRegFrm, CondMovFP, (ops RST:$op), "fcmovae {$op, %ST(0)|%ST(0), $op}">, DB; def FCMOVA : FPI<0xD0, AddRegFrm, CondMovFP, (ops RST:$op), "fcmova {$op, %ST(0)|%ST(0), $op}">, DB; def FCMOVNE : FPI<0xC8, AddRegFrm, CondMovFP, (ops RST:$op), "fcmovne {$op, %ST(0)|%ST(0), $op}">, DB; + def FCMOVNP : FPI<0xD8, AddRegFrm, CondMovFP, + (ops RST:$op), "fcmovnu {$op, %ST(0)|%ST(0), $op}">, DB; } // Floating point loads & stores... diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp index f98ddb4fdc..456c0b32d0 100644 --- a/lib/Target/X86/X86RegisterInfo.cpp +++ b/lib/Target/X86/X86RegisterInfo.cpp @@ -276,6 +276,10 @@ MachineInstr* X86RegisterInfo::foldMemoryOperand(MachineInstr* MI, case X86::CMOVS32rr: return MakeRMInst(X86::CMOVS32rm , FrameIndex, MI); case X86::CMOVNS16rr: return MakeRMInst(X86::CMOVNS16rm , FrameIndex, MI); case X86::CMOVNS32rr: return MakeRMInst(X86::CMOVNS32rm , FrameIndex, MI); + case X86::CMOVP16rr: return MakeRMInst(X86::CMOVP16rm , FrameIndex, MI); + case X86::CMOVP32rr: return MakeRMInst(X86::CMOVP32rm , FrameIndex, MI); + case X86::CMOVNP16rr: return MakeRMInst(X86::CMOVNP16rm , FrameIndex, MI); + case X86::CMOVNP32rr: return MakeRMInst(X86::CMOVNP32rm , FrameIndex, MI); case X86::CMOVL16rr: return MakeRMInst(X86::CMOVL16rm , FrameIndex, MI); case X86::CMOVL32rr: return MakeRMInst(X86::CMOVL32rm , FrameIndex, MI); case X86::CMOVGE16rr: return MakeRMInst(X86::CMOVGE16rm , FrameIndex, MI); |