diff options
| -rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp | 13 | ||||
| -rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeTypes.h | 1 | ||||
| -rw-r--r-- | test/CodeGen/ARM/2009-04-08-FREM.ll | 9 |
3 files changed, 23 insertions, 0 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp index 5aa71ec010..8a214a11a5 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp @@ -80,6 +80,7 @@ void DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) { case ISD::FP_ROUND: R = SoftenFloatRes_FP_ROUND(N); break; case ISD::FPOW: R = SoftenFloatRes_FPOW(N); break; case ISD::FPOWI: R = SoftenFloatRes_FPOWI(N); break; + case ISD::FREM: R = SoftenFloatRes_FREM(N); break; case ISD::FRINT: R = SoftenFloatRes_FRINT(N); break; case ISD::FSIN: R = SoftenFloatRes_FSIN(N); break; case ISD::FSQRT: R = SoftenFloatRes_FSQRT(N); break; @@ -363,6 +364,18 @@ SDValue DAGTypeLegalizer::SoftenFloatRes_FPOWI(SDNode *N) { NVT, Ops, 2, false, N->getDebugLoc()); } +SDValue DAGTypeLegalizer::SoftenFloatRes_FREM(SDNode *N) { + MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0)); + SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)), + GetSoftenedFloat(N->getOperand(1)) }; + return MakeLibCall(GetFPLibCall(N->getValueType(0), + RTLIB::REM_F32, + RTLIB::REM_F64, + RTLIB::REM_F80, + RTLIB::REM_PPCF128), + NVT, Ops, 2, false, N->getDebugLoc()); +} + SDValue DAGTypeLegalizer::SoftenFloatRes_FRINT(SDNode *N) { MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0)); SDValue Op = GetSoftenedFloat(N->getOperand(0)); diff --git a/lib/CodeGen/SelectionDAG/LegalizeTypes.h b/lib/CodeGen/SelectionDAG/LegalizeTypes.h index add978b02b..8c68aef57b 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeTypes.h +++ b/lib/CodeGen/SelectionDAG/LegalizeTypes.h @@ -414,6 +414,7 @@ private: SDValue SoftenFloatRes_FP_ROUND(SDNode *N); SDValue SoftenFloatRes_FPOW(SDNode *N); SDValue SoftenFloatRes_FPOWI(SDNode *N); + SDValue SoftenFloatRes_FREM(SDNode *N); SDValue SoftenFloatRes_FRINT(SDNode *N); SDValue SoftenFloatRes_FSIN(SDNode *N); SDValue SoftenFloatRes_FSQRT(SDNode *N); diff --git a/test/CodeGen/ARM/2009-04-08-FREM.ll b/test/CodeGen/ARM/2009-04-08-FREM.ll new file mode 100644 index 0000000000..c7e343c892 --- /dev/null +++ b/test/CodeGen/ARM/2009-04-08-FREM.ll @@ -0,0 +1,9 @@ +; RUN: llvm-as < %s | llc -march=arm + +declare i32 @printf(i8*, ...) + +define i32 @main() { + %rem_r = frem double 0.000000e+00, 0.000000e+00 ; <double> [#uses=1] + %1 = call i32 (i8*, ...)* @printf(i8* null, double %rem_r) ; <i32> [#uses=0] + ret i32 0 +} |