diff options
| -rw-r--r-- | lib/Target/ARM/ARMInstrThumb2.td | 47 | ||||
| -rw-r--r-- | test/MC/ARM/thumb2.s | 6 |
2 files changed, 40 insertions, 13 deletions
diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td index ace133339e..c560c53554 100644 --- a/lib/Target/ARM/ARMInstrThumb2.td +++ b/lib/Target/ARM/ARMInstrThumb2.td @@ -1989,10 +1989,30 @@ defm t2BIC : T2I_bin_w_irs<0b0001, "bic", IIC_iBITi, IIC_iBITr, IIC_iBITsi, BinOpFrag<(and node:$LHS, (not node:$RHS))>>; -let Constraints = "$src = $dst" in -def t2BFC : T2I<(outs rGPR:$dst), (ins rGPR:$src, bf_inv_mask_imm:$imm), - IIC_iUNAsi, "bfc", "\t$dst, $imm", - [(set rGPR:$dst, (and rGPR:$src, bf_inv_mask_imm:$imm))]> { +class T2BitFI<dag oops, dag iops, InstrItinClass itin, + string opc, string asm, list<dag> pattern> + : T2I<oops, iops, itin, opc, asm, pattern> { + bits<4> Rd; + bits<10> imm; + + let Inst{11-8} = Rd{3-0}; + let Inst{4-0} = imm{9-5}; + let Inst{14-12} = imm{4-2}; + let Inst{7-6} = imm{1-0}; +} + +class T2TwoRegBitFI<dag oops, dag iops, InstrItinClass itin, + string opc, string asm, list<dag> pattern> + : T2BitFI<oops, iops, itin, opc, asm, pattern> { + bits<4> Rn; + + let Inst{3-0} = Rn{3-0}; +} + +let Constraints = "$src = $Rd" in +def t2BFC : T2BitFI<(outs rGPR:$Rd), (ins rGPR:$src, bf_inv_mask_imm:$imm), + IIC_iUNAsi, "bfc", "\t$Rd, $imm", + [(set rGPR:$Rd, (and rGPR:$src, bf_inv_mask_imm:$imm))]> { let Inst{31-27} = 0b11110; let Inst{25} = 1; let Inst{24-20} = 0b10110; @@ -2000,16 +2020,17 @@ def t2BFC : T2I<(outs rGPR:$dst), (ins rGPR:$src, bf_inv_mask_imm:$imm), let Inst{15} = 0; } -def t2SBFX: T2I<(outs rGPR:$dst), (ins rGPR:$src, imm0_31:$lsb, imm0_31:$width), - IIC_iUNAsi, "sbfx", "\t$dst, $src, $lsb, $width", []> { +def t2SBFX: T2TwoRegBitFI< + (outs rGPR:$Rd), (ins rGPR:$Rn, bf_inv_mask_imm:$imm), + IIC_iUNAsi, "sbfx", "\t$Rd, $Rn, $imm", []> { let Inst{31-27} = 0b11110; let Inst{25} = 1; let Inst{24-20} = 0b10100; let Inst{15} = 0; } -def t2UBFX: T2I<(outs rGPR:$dst), (ins rGPR:$src, imm0_31:$lsb, imm0_31:$width), - IIC_iUNAsi, "ubfx", "\t$dst, $src, $lsb, $width", []> { +def t2UBFX: T2I<(outs rGPR:$Rd), (ins rGPR:$Rn, bf_inv_mask_imm:$imm), + IIC_iUNAsi, "ubfx", "\t$Rd, $Rn, $imm", []> { let Inst{31-27} = 0b11110; let Inst{25} = 1; let Inst{24-20} = 0b11100; @@ -2017,11 +2038,11 @@ def t2UBFX: T2I<(outs rGPR:$dst), (ins rGPR:$src, imm0_31:$lsb, imm0_31:$width), } // A8.6.18 BFI - Bitfield insert (Encoding T1) -let Constraints = "$src = $dst" in -def t2BFI : T2I<(outs rGPR:$dst), - (ins rGPR:$src, rGPR:$val, bf_inv_mask_imm:$imm), - IIC_iBITi, "bfi", "\t$dst, $val, $imm", - [(set rGPR:$dst, (ARMbfi rGPR:$src, rGPR:$val, +let Constraints = "$src = $Rd" in +def t2BFI : T2BitFI<(outs rGPR:$Rd), + (ins rGPR:$src, rGPR:$Rn, bf_inv_mask_imm:$imm), + IIC_iBITi, "bfi", "\t$Rd, $Rn, $imm", + [(set rGPR:$Rd, (ARMbfi rGPR:$src, rGPR:$Rn, bf_inv_mask_imm:$imm))]> { let Inst{31-27} = 0b11110; let Inst{25} = 1; diff --git a/test/MC/ARM/thumb2.s b/test/MC/ARM/thumb2.s index eb5336f428..b60ad94d75 100644 --- a/test/MC/ARM/thumb2.s +++ b/test/MC/ARM/thumb2.s @@ -52,3 +52,9 @@ @ CHECK: rrx r0, r0 @ encoding: [0x30,0x00,0x4f,0xea] rrx r0, r0 +@ CHECK: bfc r0, #4, #20 @ encoding: [0x17,0x10,0x6f,0xf3] + bfc r0, #4, #20 +@ CHECK: bfc r0, #0, #23 @ encoding: [0x16,0x00,0x6f,0xf3] + bfc r0, #0, #23 +@ CHECK: bfc r0, #12, #20 @ encoding: [0x1f,0x30,0x6f,0xf3] + bfc r0, #12, #20 |