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authorSylvestre Ledru <sylvestre@debian.org>2012-09-27 10:14:43 +0000
committerSylvestre Ledru <sylvestre@debian.org>2012-09-27 10:14:43 +0000
commit94c22716d60ff5edf6a98a3c67e0faa001be1142 (patch)
tree2442b2b9658c29e72b1dd7abae926751854c68dc /utils/TableGen
parent7e2c793a2b5c746344652b6579e958ee42fafdcc (diff)
Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. See: http://en.wikipedia.org/wiki/If_and_only_if Commit 164767
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164768 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen')
-rw-r--r--utils/TableGen/CodeGenRegisters.cpp2
-rw-r--r--utils/TableGen/CodeGenRegisters.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/utils/TableGen/CodeGenRegisters.cpp b/utils/TableGen/CodeGenRegisters.cpp
index 01deaab53f..f195b4e3fa 100644
--- a/utils/TableGen/CodeGenRegisters.cpp
+++ b/utils/TableGen/CodeGenRegisters.cpp
@@ -532,7 +532,7 @@ CodeGenRegister::addSubRegsPreOrder(SetVector<const CodeGenRegister*> &OSet,
//
// Alternatively:
//
-// overlap(A, B) if there exists:
+// overlap(A, B) iff there exists:
// A' in { A, subregs(A) } and B' in { B, subregs(B) } such that:
// A' = B' or A' in aliases(B') or B' in aliases(A').
//
diff --git a/utils/TableGen/CodeGenRegisters.h b/utils/TableGen/CodeGenRegisters.h
index 3bd4b09946..e411074156 100644
--- a/utils/TableGen/CodeGenRegisters.h
+++ b/utils/TableGen/CodeGenRegisters.h
@@ -183,7 +183,7 @@ namespace llvm {
bool inheritRegUnits(CodeGenRegBank &RegBank);
// Adopt a register unit for pressure tracking.
- // A unit is adopted if its unit number is >= NumNativeRegUnits.
+ // A unit is adopted iff its unit number is >= NumNativeRegUnits.
void adoptRegUnit(unsigned RUID) { RegUnits.push_back(RUID); }
// Get the sum of this register's register unit weights.