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| author | Jim Grosbach <grosbach@apple.com> | 2011-03-11 23:11:41 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-03-11 23:11:41 +0000 |
| commit | 5380bbf6069fc3e71d01c10c8bf139124a50216a (patch) | |
| tree | e3b0abb4abbdc9f6d3aab5de3c396654085ec753 /utils/TableGen/ARMDecoderEmitter.cpp | |
| parent | f219f3135d0ec939acd42801766c17fad41c0173 (diff) | |
Remove dead code. These ARM instruction definitions no longer exist.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127508 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/ARMDecoderEmitter.cpp')
| -rw-r--r-- | utils/TableGen/ARMDecoderEmitter.cpp | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/utils/TableGen/ARMDecoderEmitter.cpp b/utils/TableGen/ARMDecoderEmitter.cpp index 67e2bafa8f..4c081875ee 100644 --- a/utils/TableGen/ARMDecoderEmitter.cpp +++ b/utils/TableGen/ARMDecoderEmitter.cpp @@ -1600,15 +1600,6 @@ ARMDEBackend::populateInstruction(const CodeGenInstruction &CGI, Name == "FNEGDcc") return false; - // Ditto for VNEGDcc and VNEGScc. - if (Name == "VNEGDcc" || Name == "VNEGScc") - return false; - - // LDMIA_RET is a special case of LDM (Load Multiple) where the registers - // loaded include the PC, causing a branch to a loaded address. Ignore - // the LDMIA_RET instruction when decoding. - if (Name == "LDMIA_RET") return false; - // Bcc is in a more generic form than B. Ignore B when decoding. if (Name == "B") return false; |