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authorJakob Stoklund Olesen <stoklund@2pi.dk>2012-05-14 15:20:39 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2012-05-14 15:20:39 +0000
commitf402602199a3fc875bb9b6887869e647d0b49df2 (patch)
tree1225da92de801e10020530f46a0a2111ba97093d /unittests/ADT/BitVectorTest.cpp
parent31d938a6b1173c642f975d78417459d4d8cd3677 (diff)
Consider ad hoc aliasing when building RegUnits.
Register units can be used to compute if two registers overlap: A overlaps B iff units(A) intersects units(B). With this change, the above holds true even on targets that use ad hoc aliasing (currently only ARM). This means that register units can be used to implement regsOverlap() more efficiently, and the register allocator can use the concept to model interference. When there is no ad hoc aliasing, the register units correspond to the maximal cliques in the register overlap graph. This is optimal, no other register unit assignment can have fewer units. With ad hoc aliasing, weird things are possible, and we don't try too hard to compute the maximal cliques. The current approach is always correct, and it works very well (probably optimally) as long as the ad hoc aliasing doesn't have cliques larger than pairs. It seems unlikely that any target would need more. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156763 91177308-0d34-0410-b5e6-96231b3b80d8
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