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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-07-29 00:27:35 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-07-29 00:27:35 +0000 |
| commit | fe42808f44a91421d46e68e85e7486a22a5a26ee (patch) | |
| tree | 151e8c79492226e169c1799524a026b469a13e14 /test | |
| parent | e69438fb87623dd6fdeeb99b647a46e877eb6183 (diff) | |
Transfer implicit operands in NEONMoveFixPass.
Later passes /are/ using this information when running the register
scavenger.
This fixes the second problem in PR10520.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136440 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/ARM/crash.ll | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/crash.ll b/test/CodeGen/ARM/crash.ll index 979442accf..0f6f33e044 100644 --- a/test/CodeGen/ARM/crash.ll +++ b/test/CodeGen/ARM/crash.ll @@ -48,3 +48,24 @@ bb: store <4 x float> %tmp20, <4 x float>* undef, align 16 ret void } + +; PR10520, second bug. NEONMoveFixPass needs to preserve implicit operands. +define arm_aapcs_vfpcc void @pr10520_2() nounwind align 2 { +bb: + %tmp76 = shufflevector <2 x i64> zeroinitializer, <2 x i64> zeroinitializer, <1 x i32> <i32 1> + %tmp77 = bitcast <1 x i64> %tmp76 to <2 x float> + %tmp78 = shufflevector <2 x float> %tmp77, <2 x float> %tmp77, <4 x i32> zeroinitializer + %tmp81 = fmul <4 x float> undef, %tmp78 + %tmp82 = fadd <4 x float> %tmp81, undef + %tmp85 = fadd <4 x float> %tmp82, undef + %tmp86 = bitcast <4 x float> %tmp85 to i128 + %tmp136 = bitcast i128 %tmp86 to <4 x float> + %tmp137 = bitcast <4 x float> %tmp136 to i128 + %tmp138 = bitcast i128 %tmp137 to <4 x float> + %tmp139 = bitcast <4 x float> %tmp138 to i128 + %tmp152 = bitcast i128 %tmp139 to <4 x float> + %tmp153 = bitcast <4 x float> %tmp152 to i128 + %tmp154 = bitcast i128 %tmp153 to <4 x float> + store <4 x float> %tmp154, <4 x float>* undef, align 16 + ret void +} |