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authorMichael Liao <michael.liao@intel.com>2012-09-19 19:36:58 +0000
committerMichael Liao <michael.liao@intel.com>2012-09-19 19:36:58 +0000
commitcd9ede9fc00be3f13e6f450b63419ed80f225d48 (patch)
tree1822c20a55b1bce32ed64d5040b8a3e0047a6fba /test
parentfc879791f2c6329bb9377ebf8a03608f6590f80e (diff)
Unify the logic in SelectAtomicLoadAdd and SelectAtomicLoadArith
- Merge the processing of LOAD_ADD with other atomic load-arith operations - Separate the logic getting target constant for atomic-load-op and add an optimization for atomic-load-add on i16 with negative value - Optimize a minor case for atomic-fetch-add i16 with negative operand. Test case is revised. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164243 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r--test/CodeGen/X86/atomic_add.ll3
1 files changed, 2 insertions, 1 deletions
diff --git a/test/CodeGen/X86/atomic_add.ll b/test/CodeGen/X86/atomic_add.ll
index 1fce256a8a..d94499889d 100644
--- a/test/CodeGen/X86/atomic_add.ll
+++ b/test/CodeGen/X86/atomic_add.ll
@@ -178,7 +178,8 @@ entry:
define void @sub2(i16* nocapture %p, i32 %v) nounwind ssp {
entry:
; CHECK: sub2:
-; CHECK: negl
+; CHECK-NOT: negl
+; CHECK: subw
%0 = trunc i32 %v to i16 ; <i16> [#uses=1]
%1 = atomicrmw sub i16* %p, i16 %0 monotonic
ret void