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authorDan Gohman <sunfish@mozilla.com>2014-03-06 12:23:34 -0800
committerDan Gohman <sunfish@mozilla.com>2014-03-06 12:56:53 -0800
commit68081ee62375a1d900d46f969e38330f14fb8775 (patch)
treeeff19c661971d355ad3894006b63262ec3d2f94d /test
parent0444ffab64aab77d74252b9c08445cd46b595d84 (diff)
Implement integer promotion for urem, udiv, srem, and sdiv
The optimizer sometimes thinks it's beneficial to truncate all manner of i64 operators to narrower types, even when still wider than the platform's widest legal type.
Diffstat (limited to 'test')
-rw-r--r--test/Transforms/NaCl/promote-integers.ll56
1 files changed, 56 insertions, 0 deletions
diff --git a/test/Transforms/NaCl/promote-integers.ll b/test/Transforms/NaCl/promote-integers.ll
index 7c010be32b..baab0822cd 100644
--- a/test/Transforms/NaCl/promote-integers.ll
+++ b/test/Transforms/NaCl/promote-integers.ll
@@ -228,6 +228,62 @@ define void @ashr1(i16 %a) {
ret void
}
+; CHECK: @udiv1
+define void @udiv1(i32 %a, i32 %b) {
+; CHECK-NEXT: %a33 = zext i32 %a to i64
+ %a33 = zext i32 %a to i33
+; CHECK-NEXT: %b33 = zext i32 %b to i64
+ %b33 = zext i32 %b to i33
+; CHECK-NEXT: %a33.clear = and i64 %a33, 8589934591
+; CHECK-NEXT: %b33.clear = and i64 %b33, 8589934591
+; CHECK-NEXT: %result = udiv i64 %a33.clear, %b33.clear
+ %result = udiv i33 %a33, %b33
+ ret void
+}
+
+; CHECK: @sdiv1
+define void @sdiv1(i32 %a, i32 %b) {
+; CHECK-NEXT: %a33 = sext i32 %a to i64
+ %a33 = sext i32 %a to i33
+; CHECK-NEXT: %b33 = sext i32 %b to i64
+; CHECK-NEXT: %a33.getsign = shl i64 %a33, 31
+; CHECK-NEXT: %a33.signed = ashr i64 %a33.getsign, 31
+; CHECK-NEXT: %b33.getsign = shl i64 %b33, 31
+; CHECK-NEXT: %b33.signed = ashr i64 %b33.getsign, 31
+ %b33 = sext i32 %b to i33
+; CHECK-NEXT: %result = sdiv i64 %a33.signed, %b33.signed
+ %result = sdiv i33 %a33, %b33
+ ret void
+}
+
+; CHECK: @urem1
+define void @urem1(i32 %a, i32 %b) {
+; CHECK-NEXT: %a33 = zext i32 %a to i64
+ %a33 = zext i32 %a to i33
+; CHECK-NEXT: %b33 = zext i32 %b to i64
+; CHECK-NEXT: %a33.clear = and i64 %a33, 8589934591
+; CHECK-NEXT: %b33.clear = and i64 %b33, 8589934591
+ %b33 = zext i32 %b to i33
+; CHECK-NEXT: %result = urem i64 %a33.clear, %b33.clear
+ %result = urem i33 %a33, %b33
+ ret void
+}
+
+; CHECK: @srem1
+define void @srem1(i32 %a, i32 %b) {
+; CHECK-NEXT: %a33 = sext i32 %a to i64
+ %a33 = sext i32 %a to i33
+; CHECK-NEXT: %b33 = sext i32 %b to i64
+; CHECK-NEXT: %a33.getsign = shl i64 %a33, 31
+; CHECK-NEXT: %a33.signed = ashr i64 %a33.getsign, 31
+; CHECK-NEXT: %b33.getsign = shl i64 %b33, 31
+; CHECK-NEXT: %b33.signed = ashr i64 %b33.getsign, 31
+ %b33 = sext i32 %b to i33
+; CHECK-NEXT: %result = srem i64 %a33.signed, %b33.signed
+ %result = srem i33 %a33, %b33
+ ret void
+}
+
; CHECK: @phi_icmp
define void @phi_icmp(i32 %a) {
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