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| author | Tanya Lattner <tonic@nondot.org> | 2011-06-14 23:48:48 +0000 |
|---|---|---|
| committer | Tanya Lattner <tonic@nondot.org> | 2011-06-14 23:48:48 +0000 |
| commit | 189531f317d0b3a082f78cc2da44128e4ff8e17d (patch) | |
| tree | 7615494269345cd271399deab7df1cc67f4a10e9 /test | |
| parent | a6ad8236757f5cf37273a34c219eb465d97769dd (diff) | |
Add an optimization that looks for a specific pair-wise add pattern and generates a vpaddl instruction instead of scalarizing the add.
Includes a test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133027 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/ARM/vpadd.ll | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/vpadd.ll b/test/CodeGen/ARM/vpadd.ll index 2125573945..1ba68f5523 100644 --- a/test/CodeGen/ARM/vpadd.ll +++ b/test/CodeGen/ARM/vpadd.ll @@ -138,6 +138,20 @@ define <2 x i64> @vpaddlQu32(<4 x i32>* %A) nounwind { ret <2 x i64> %tmp2 } +; Test AddCombine optimization that generates a vpaddl.s +define void @addCombineToVPADDL() nounwind ssp { +; CHECK: vpaddl.s8 + %cbcr = alloca <16 x i8>, align 16 + %X = alloca <8 x i8>, align 8 + %tmp = load <16 x i8>* %cbcr + %tmp1 = shufflevector <16 x i8> %tmp, <16 x i8> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> + %tmp2 = load <16 x i8>* %cbcr + %tmp3 = shufflevector <16 x i8> %tmp2, <16 x i8> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> + %add = add <8 x i8> %tmp3, %tmp1 + store <8 x i8> %add, <8 x i8>* %X, align 8 + ret void +} + declare <4 x i16> @llvm.arm.neon.vpaddls.v4i16.v8i8(<8 x i8>) nounwind readnone declare <2 x i32> @llvm.arm.neon.vpaddls.v2i32.v4i16(<4 x i16>) nounwind readnone declare <1 x i64> @llvm.arm.neon.vpaddls.v1i64.v2i32(<2 x i32>) nounwind readnone |