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authorJF Bastien <jfb@chromium.org>2013-08-01 15:06:01 -0700
committerJF Bastien <jfb@chromium.org>2013-08-01 15:06:01 -0700
commita7665e96f34c4a981d59c78b0b872b8f0b100cb9 (patch)
treeaa05a7a1f915980654ae61c5a2f5952abfc7e561 /test/Transforms
parentb9657234ee8b1951db5977a8ffb55a2e5df6d76c (diff)
Add Intrinsic::nacl_atomic_is_lock_free
This is part of a bigger CL to fix C++11 in PNaCl, to commit in the following order: - https://codereview.chromium.org/20552002 - https://codereview.chromium.org/20554002 - https://codereview.chromium.org/20560002 - https://codereview.chromium.org/20561002 This should be the last PNaCl ABI change for C11/C+11 atomic support. Note that Clang already has a builtin for lock-free, but it's partly resolved by Clang's ExprConstant.cpp and CGBuiltin.cpp, whereas what we want is a call that becomes a constant at translation-time. I made the translation part fairly general so it's easy to support architectures where ``true`` isn't always the right answer. BUG= https://code.google.com/p/nativeclient/issues/detail?id=3475 TEST= ./scons run_synchronization_cpp11_test --verbose bitcode=1 platform=x86-64 TEST= ninja check-all R=dschuff@chromium.org Review URL: https://codereview.chromium.org/20554002
Diffstat (limited to 'test/Transforms')
-rw-r--r--test/Transforms/NaCl/resolve-pnacl-intrinsics.ll32
1 files changed, 32 insertions, 0 deletions
diff --git a/test/Transforms/NaCl/resolve-pnacl-intrinsics.ll b/test/Transforms/NaCl/resolve-pnacl-intrinsics.ll
index af9a38df0f..737561ee1d 100644
--- a/test/Transforms/NaCl/resolve-pnacl-intrinsics.ll
+++ b/test/Transforms/NaCl/resolve-pnacl-intrinsics.ll
@@ -29,6 +29,7 @@ declare i16 @llvm.nacl.atomic.cmpxchg.i16(i16*, i16, i16, i32, i32)
declare i32 @llvm.nacl.atomic.cmpxchg.i32(i32*, i32, i32, i32, i32)
declare i64 @llvm.nacl.atomic.cmpxchg.i64(i64*, i64, i64, i32, i32)
declare void @llvm.nacl.atomic.fence(i32)
+declare i1 @llvm.nacl.atomic.is.lock.free(i32, i8*)
; These declarations must be here because the function pass expects
; to find them. In real life they're inserted by the translator
@@ -99,6 +100,37 @@ define void @test_synchronize() {
ret void
}
+; CHECK: @test_is_lock_free_1
+define i1 @test_is_lock_free_1(i8* %ptr) {
+ ; CHECK: ret i1 {{true|false}}
+ %res = call i1 @llvm.nacl.atomic.is.lock.free(i32 1, i8* %ptr)
+ ret i1 %res
+}
+
+; CHECK: @test_is_lock_free_2
+define i1 @test_is_lock_free_2(i16* %ptr) {
+ ; CHECK: ret i1 {{true|false}}
+ %ptr2 = bitcast i16* %ptr to i8*
+ %res = call i1 @llvm.nacl.atomic.is.lock.free(i32 2, i8* %ptr2)
+ ret i1 %res
+}
+
+; CHECK: @test_is_lock_free_4
+define i1 @test_is_lock_free_4(i32* %ptr) {
+ ; CHECK: ret i1 {{true|false}}
+ %ptr2 = bitcast i32* %ptr to i8*
+ %res = call i1 @llvm.nacl.atomic.is.lock.free(i32 4, i8* %ptr2)
+ ret i1 %res
+}
+
+; CHECK: @test_is_lock_free_8
+define i1 @test_is_lock_free_8(i64* %ptr) {
+ ; CHECK: ret i1 {{true|false}}
+ %ptr2 = bitcast i64* %ptr to i8*
+ %res = call i1 @llvm.nacl.atomic.is.lock.free(i32 8, i8* %ptr2)
+ ret i1 %res
+}
+
; CHECK: @test_lock_test_and_set_i32
define i32 @test_lock_test_and_set_i32(i32* %ptr, i32 %value) {
; CHECK: %1 = atomicrmw xchg i32* %ptr, i32 %value seq_cst